Optimisation of mass nano-sensors
A novel mass detector with extraordinary measuring abilities can be manufactured by creating an array of nanometre scale silicon cantilevers and combining them with complementary metal-oxide-semiconductor (CMOS) circuitry. Nanolithography is used to place the nanomechanical structure on the already completed CMOS circuit. This fabrication technique has been extensively elaborated by NANOMASS II partners. Using the nanolithography technique as a base, an atomic force microscope (AFM) has now been used for the definition of the nanoscale structure on the CMOS circuit. AFM nanolithography not only reduces the dimensions of the nanocantilevers but also contributes to the cleaning process of the surface where the nanostructures will be then defined. A low surface roughness and lack of contaminant particles is required and is achieved using a thin layer of aluminium, which is locally oxidised by the tip of the AFM. A Silicon on Insulator (SOI) wafer is used for the fabrication of the CMOS circuit. This gives the opportunity to further reduce the dimensions of the nanocantilevers, because crystalline silicon can now be used instead of polysilicon for their fabrication. Structurally, the CMOS circuit is on the bottom, at the silicon side of the wafer while the nanomechanical structure is on the top SOI layer. The developed fabrication techniques not only provide environmental and biochemical sciences with a compact and sensitive mass detector but may also be used in general for defining nanostructures on pre-processed CMOS substrates. The innovative technological approach that was used in the course of this project resulted in the fabrication of demonstrators that will now undergo extensive functionality tests. Therefore industrial applications may soon be expected.
