Description du projet
Améliorer les performances des systèmes de calcul exaflopiques
Capables d’effectuer un milliard d’opérations par seconde, les supercalculateurs exaflopiques ont encore besoin de combler les lacunes technologiques qui limitent leurs performances et leur efficacité énergétique. Il est aujourd’hui nécessaire d’augmenter la capacité de calcul et de permettre l’intégration transparente d’accélérateurs reconfigurables dans des plateformes multi-nœuds hétérogènes de calcul haute performance (HPC, high-performance computing). Le projet TEXTAROSSA, financé par l’UE, entend combler ces lacunes en adoptant une approche de co-conception pour créer et développer à la fois un système de supercalculateur efficace basé sur de nouveaux accélérateurs matériels, un équipement de refroidissement biphasé innovant, des algorithmes, des méthodes et des logiciels avancés pour les domaines traditionnels du HPC ainsi que pour les domaines émergents de l’intelligence artificielle et de l’analyse de données à haute performance.
Objectif
To achieve high performance and high energy efficiency on near-future exascale computing systems, a technology gap needs to be bridged: increase efficiency of computation with extreme efficiency in HW and new arithmetics, as well as providing methods and tools for seamless integration of reconfigurable accelerators in heterogeneous HPC multi-node platforms. TEXTAROSSA aims at tackling this gap through applying a co-design approach to heterogeneous HPC solutions, supported by the integration and extension of IPs, programming models and tools derived from European research projects, led by TEXTAROSSA partners. The main directions for innovation are towards: i) enabling mixed-precision computing, through the definition of IPs, libraries, and compilers supporting novel data types (including Posits), used also to boost the performance of AI accelerators; ii) implementing new multilevel thermal management and two-phase liquid cooling; iii) developing improved data movement and storage tools through compression; iv) ensure secure HPC operation through HW accelerated cryptography; v) providing RISC-V based IP for fast task scheduling and IPs for low-latency intra/inter-node communication. These technologies will be tested on the Integrated Development Vehicles mirroring and extending the European Processor Initiative ARM64-based architecture, and on an OpenSequana testbed. To drive the technology development and assess the impact of the proposed innovations TEXTAROSSA will use a selected but representative number of HPC, HPDA and AI demonstrators covering challenging HPC domains such as general-purpose numerical kernels, High Energy Physics (HEP), Oil & Gas, climate modelling, and emerging domains such as High Performance Data Analytics (HPDA) and High Performance Artificial Intelligence (HPC-AI).
Champ scientifique
- natural sciencescomputer and information sciencesartificial intelligence
- natural sciencescomputer and information sciencescomputer securitycryptography
- natural sciencesmathematicspure mathematicsarithmetics
- engineering and technologyelectrical engineering, electronic engineering, information engineeringelectronic engineeringcomputer hardwaresupercomputers
- natural sciencesphysical sciencestheoretical physics
Programme(s)
Régime de financement
RIA - Research and Innovation actionCoordinateur
00196 Roma
Italie