Powering up for broadband
Broadband 'ultra-fast' internet connection goes hand in hand with progress in achieving Europe's Digital Agenda. For many Europeans it is already a standard feature of daily life online, and essential to benefit from features of Web 2.0. But delivering the broadband dividend to Europe's remote mountain villages and regions is not that easy. Typically, the higher data transfer rates achieved with broadband come from fibre-optic cables and some special tools that harness satellite communications for this purpose. But cheaper, easier ways of turning on the broadband tap across Europe are needed. This is where projects like the European-funded Powernet come in. The main goal of Powernet was to develop what it calls 'Cognitive broadband over power lines' (CBPL), no doubt taking advantage of the widespread power line infrastructure already in place throughout the continent. The project set out to create demonstrators that not only deliver the high data rates expected of broadband, but to do it more efficiently - using low transmit power spectral density (PSD) and working at low signal-to-noise ratio. The demos had to also meet the regulatory requirements concerning electro-magnetic (EM) radiation. And to be ready for initial field trials, the project had to do all this in just one year using off-the-shelf components. Not a simple task. The first field trials were to confirm the design validation and, among other things, to help guide development of an application-specific integrated circuit (ASIC) - a microchip for a special application - for the analogue front end (AFE), which is one of the complex parts of the planned CBPL system. The digital circuits were designed to be configured by the customer or designer after manufacturing using field-programmable gate array (FPGA). The benefit of the FPGA approach is it can be commercially developed later as a digital ASIC to complement the analogue ASIC, according to the project partners. Based on the first set of trials the analogue ASIC was developed in the second year of the project. This chip was tested for its performance and integrated into digital circuit boards needed for the new CBPL demonstrator units. Also in the second phase of the 29-month Powernet project, software algorithms were applied to correct errors in the system, working towards the so-called 'cognitive algorithms' that can learn from the data they are dealing with. The final step was to integrate the parts - the analogue ASIC into the CBPL demo - and test and make any necessary adjustments. In field trials, the demonstrator units performed better than current technology on the market, reaching the desired PSD and EM radiation goals, the team reported. The five partners - three SMEs, one research institute and one public utility - were eager to get word out in conferences and meetings with peers that the technology is validated. This dissemination and awareness campaign included standardisation efforts. Powernet has played an active part in IEEE 1901 standards in this field and its work has been viewed positively by Homeplug/Panasonic, the electronics group. Since ending the EU-funded part of the work in 2008, the project has received a number of enquiries for possible field trials on their electricity distribution networks. Other groups have expressed interest in helping to exploit the results of the Powernet project.
