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Contenu archivé le 2024-05-23

Advanced techniques for high temperature system-on-chip

Objectif

ATHIS aims to demonstrate advanced techniques required for novel maximally integrated, miniaturised, distributed electronic systems with high reliability in high-temperature environments (in excess of 200°C), for future deployment in safety and efficiency critical systems within the automotive, aerospace, avionics, ships and oil extraction industries. This will be based on the realization of novel mixed analogue-digital-memory circuit IP cores in aggressive thin-film SOI technologies, their original integration into a system-on-chip, their combination with new dedicated power and passive devices using advanced MCM and flip-chip packaging solutions, their verification by appropriate methodologies for highly-integrated system level testing and by a final demonstrator targeting future high-efficiency cars.

Appel à propositions

Data not available

Régime de financement

CSC - Cost-sharing contracts

Coordinateur

UNIVERSITE CATHOLIQUE DE LOUVAIN
Contribution de l’UE
Aucune donnée
Adresse
3,Place du Levant 3
1348 LOUVAIN-LA-NEUVE
Belgique

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Coût total
Aucune donnée

Participants (6)