Projektbeschreibung
Design of semiconductor components and electronic based miniaturised systems
DIAMOND develops methodology and integrated environment for diagnosis and correction of errors regarding the design and implementation of digital ICs.
The aim of DIAMOND project is improving the productivity and reliability of semiconductor and electronic system design in Europe by providing a systematic methodology and an integrated environment for the diagnosis and correction of errors. Increasing design costs are the main challenge facing the semiconductor community. Assuring the correctness of the design contributes to the major part of the problem. However, while diagnosis and correction of errors are more time-consuming compared to error detection, they have received far less attention, both in terms of research works and industrial tools introduced. Another, orthogonal threat to the development is the rapidly growing rate of soft-errors in the emerging nanometer technologies. According to roadmaps, soft-errors in sequential logic are becoming a more severe issue than in memories. However, the design community is not ready for this challenge because existing soft-error escape identification methods for sequential logic are inadequate. The DIAMOND project aims at developing a unified, holistic diagnostic model for design and soft errors as well as automated localisation and correction techniques based on the unified model, both pre-silicon and post-silicon. In addition work will be directed to the implementation of a reasoning framework for localisation and correction, encompassing word-level techniques, formal, semi-formal, and dynamic techniques and to the integration of automated correction with the diagnosis methods. DIAMOND reaches beyond the state-of-the-art by proposing an integrated approach to localisation and correction of specification, implementation, and soft errors. In addition, it considers faults on all abstraction levels, from specification through implementation down to the silicon layout. Handling this full chain of levels allows DIAMOND take advantage of hierarchical diagnosis and correction capabilities incorporating a wide range of error sources.
Increasing design costs are the main challenge facing the semiconductor community. Assuring the correctness of the design contributes to the major part of the problem. However, while diagnosis and correction of errors are more time-consuming compared to error detection, they have received far less attention, both, in terms of research works and industrial tools introduced.Another orthogonal threat to the development is the rapidly growing rate of soft-errors in the emerging nanometer technologies. According to roadmaps, soft-errors in sequential logic are becoming a more severe issue than in memories. However, the design community is not ready for this challenge because existing soft-error escape identification methods for sequential logic are inadequate.
The DIAMOND project addresses the above-mentioned challenges. The aim of DIAMOND is improving the productivity and reliability of semiconductor and electronic system design in Europe by providing a systematic methodology and an integrated environment for the diagnosis and correction of errors. DIAMOND will develop:
- A unified, holistic diagnostic model for design and soft errors;- Automated localisation and correction techniques based on the unified model, both pre-silicon and post-silicon;- Implementation of a reasoning framework for localisation and correction, encompassing word-level techniques, formal, semi-formal, and dynamic techniques;- Integration of automated correction with the diagnosis methods.DIAMOND reaches beyond the state-of-the-art by proposing an integrated approach to localisation and correction of specification, implementation, and soft errors. In addition, it considers faults on all abstraction levels, from specification through implementation down to the silicon layout. Handling this full chain of levels allows DIAMOND take advantage of hierarchical diagnosis and correction capabilities incorporating a wide range of error sources.
Wissenschaftliches Gebiet
Programm/Programme
Thema/Themen
Aufforderung zur Vorschlagseinreichung
FP7-ICT-2009-4
Andere Projekte für diesen Aufruf anzeigen
Finanzierungsplan
CP - Collaborative project (generic)Koordinator
12616 Tallinn
Estland