Understanding resistance drift in amorphous semiconductors
Memory chips in common devices like computers, smartphones and USB drives usually save one bit of digital information in each of the chip's tiny memory cells. To do this, a bit, which can either have a binary value of 0 or 1, is stored as a voltage across a capacitor. But if many bits could be stored in each cell, memory chips could store far more data. Two bits per cell would double memory capacity, say, whilst three bits would triple it, and so on. A class of substances called phase-change materials (PCMs) could implement such multibit storage but, because their electrical properties are not well enough understood, the DIASPORA project set out to try to comprehend them. Phase change materials like Germanium Antimony Tellurium (GST) can exist in two molecular phases: an ordered crystalline-structured phase, and a disordered amorphous one. When sandwiched between two electrodes, passing different electric currents through a tiny blob of GST heats the material and reversibly changes it from one phase to the other. The real prize: multibit memories But the GST blob does not have to exist entirely in one phase or the other: it can be a bit of both. The ratio of amorphous to crystalline material in the memory cell can be varied by applying different heating currents - and each mixture of the two phases has its own characteristic resistance. ‘The ability to set different resistance values would enable the storing of more than one bit of information in a single phase change material device,’ says DIASPORA project coordinator Abu Sebastian at IBM Research in Zurich, Switzerland. With four resistance values, for example, the cell could represent the four logical states that a two-bit memory could store: 00, 01, 10 and 11. And with eight resistance values, it could represent three bits, and with 16 resistance values, four bits. So it has potential to be a powerful multiplier of memory capacity. Drifters spoil the party But while PCMs hold great promise, there's a problem: the resistance of GST in its amorphous phase drifts upwards over time, which could make a multibit phase change memory unreliable. ‘So our goal in DIASPORA was to gain a deep understanding of the underlying physics of this resistance drift,’ says Sebastian, so it can be defeated in future multibit devices. To understand drift, a team led by Sebastian and Martin Salinga, DIASPORA project lead at RWTH Aachen, in Germany, undertook electrical, spectroscopic and optical experiments on nanostructured PCM devices at varying temperatures to investigate how the resistance of GST changes. They also investigated how defects in the material's molecular structure significantly exacerbate resistance drift. They then used their experimental data to create computer simulations that have led to the synthesis of the most quantitatively accurate description of resistance drift in PCM devices to date. Their pioneering model demonstrates how the root cause of the resistance drift is the spontaneous structural 'relaxation' of the amorphous material. ‘The amorphous state over time evolves towards an energetically more favourable ideal glass state,’ says Sebastian. What's next for PCM? DIASPORA's findings, and its revolutionary computer model, are a significant step towards helping researchers create reliable multibit PCM memories. ‘The ability to store 3 or more bits in a single PCM device will be a game-changer in terms of storage capacity and cost effectiveness,’ predicts Sebastian. ‘It could also enable applications that go way beyond memory such as brain-inspired computing, where PCM devices can serve as neuronal and synaptic elements in what is known as a neuromorphic computing system.’ In future research, Sebastian hopes to build on DIASPORA to explore the design of novel phase change device architectures that mitigate resistance drift - and also work out just how small a piece of confined phase change material can be and yet still operate as a memory device.
Keywords
DIASPORA, phase-change materials, non-volatile memory, multi-level storage
