Powering up transistors
Power loss is a key issue as semiconductor devices and circuits approach the limitations of scaling. Alternative transistor and memory designs are needed to enhance speed and power consumption. There is a growing need to decrease the power consumption of logic devices — chips that provide some sort of processing capability. The EU-funded 'Towards enhanced III-V tunnel transistors' (TETTRA) project examined whether tunnel field-effect transistors (FETs) can be run with less power, which will then allow them to run faster. Tunnel FETs are one of two major categories of transistors that use an electric field to control the shape and therefore the conductivity of a channel of one type of charge carrier in a semiconductor material. The choice of materials is key to enabling a reduction in voltage supply and a path to lower system power. Scientists analysed the use of nanowires and certain types of semiconductor materials in improving tunnel FET performance. Project members examined band-to-band tunnelling, which offers smaller voltages and power reduction. The surface properties of tunnel FETs are considered important for performance. As such, the partners assessed the surface properties of the nanowires and the semiconductor materials. Lastly, scientists designed and validated an innovative technique for analysing the electricity production of nanowires. Work on TETTRA has indicated that considerable power savings can be obtained by using low-voltage tunnel FETs. The prospect of lowering the power requirements of next-generation transistors is very real.
Keywords
Transistors, power consumption, tunnel transistors, field-effect transistors, voltage
