Descripción del proyecto
Allanar el camino hacia la interconexión europea de nueva generación para los futuros sistemas de exaescala
En los superordenadores de exaescala del futuro, la red de interconexión —que ya es un componente crítico en los sistemas de la informática de alto rendimiento— podría convertirse en el próximo gran cuello de botella. En la exaescala, la red debe soportar sistemas de procesamiento paralelo masivo (cientos de miles de nodos), proporcionar características que permitan a las aplicaciones escalar eficientemente a nivel de exaescala y más allá, estar preparada para nuevos aceleradores heterogéneos y unidades de cálculo, y soportar aplicaciones centradas en datos y relacionadas con la inteligencia artificial. El proyecto RED-SEA, financiado con fondos europeos, reúne a los mejores centros académicos europeos y a las principales fuerzas industriales europeas en el ámbito de las redes de interconexión para hacer frente al cuello de botella de la interconexión en la exaescala. El consorcio RED-SEA aprovecha tecnología europea clave, incluida BXI —la principal red de interconexión europea demostrada en producción— y trabaja en colaboración con muchos proyectos relacionados financiados con fondos europeos.
Objetivo
In order to enable Exascale computing, next generation interconnection networks must scale to hundreds of thousands of nodes, and must provide features to also allow the HPC, HPDA, and AI applications to reach Exascale, while benefiting from new hardware and software trends.
To achieve this goal, the RED-SEA proposal gathers the key European R&D competences, by bringing together the top academic centres with the key European industrial forces in this domain. The project will leverage BXI, the key European Interconnect, which is in production and featured in Top 500 systems, with the aim to adapt it to the challenges of coming years.
RED-SEA will pave the way to the next generation of European Exascale interconnects, including the next generation of BXI, as follows:
i. specify the new architecture using hardware-software co-design and a set of applications representative of the new terrain of converging HPC, HPDA, and AI;
ii. test, evaluate, and/or implement the new architectural features at multiple levels, according to the nature of each of them, ranging from mathematical analysis and modelling, to simulation, or to emulation or implementation on FPGA testbeds;
iii. enable seamless communication within and between resource clusters, and therefore development of a high-performance low latency gateway, bridging seamlessly with Ethernet;
iv. add efficient network resource management, thus improving congestion resiliency, virtualization, adaptive routing, collective operations;
v. open the interconnect to new kinds of applications and hardware, with enhancements for end-to-end network services – from programming models to reliability, security, low-latency, and new processors;
vi. leverage open standards and compatible APIs to develop innovative reusable libraries and Fabrics management solutions.
We will work together with the other projects resulting from the EuroHPC-01-2019 call, especially with IO-SEA (topic b) and DEEP-SEA (topic d) if they get approved.
Ámbito científico
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RIA - Research and Innovation actionCoordinador
78340 Les Clayes Sous Bois
Francia