Objetivo
Computer clock speeds have not increased since 2003, creating a challenge to invent a successor to CMOS technology able to resume performance improvement. The key requirements for a viable alternative are scalability to nanoscale dimensions – following Moore’s Law – and simultaneous reduction of line voltage in order to limit switching power. Achieving these two aims for both transistors and memory allows clock speed to again increase with dimensional scaling, a result that would have great impact across the IT industry.
We propose to demonstrate an entirely new low-voltage, memory element that makes use of internal transduction in which a voltage state external to the device is converted to an internal acoustic signal that drives an insulator-metal transition. Modelling based on the properties of known materials at device dimensions on the 15 nm scale predicts that this mechanism enables device operation at voltages an order of magnitude lower than CMOS technology while achieving 10GHz operating speed; power is thus reduced two orders.
Ámbito científico
CORDIS clasifica los proyectos con EuroSciVoc, una taxonomía plurilingüe de ámbitos científicos, mediante un proceso semiautomático basado en técnicas de procesamiento del lenguaje natural.
CORDIS clasifica los proyectos con EuroSciVoc, una taxonomía plurilingüe de ámbitos científicos, mediante un proceso semiautomático basado en técnicas de procesamiento del lenguaje natural.
- natural sciencescomputer and information sciencessoftware
- natural sciencescomputer and information sciencesinternet
- engineering and technologyelectrical engineering, electronic engineering, information engineeringelectronic engineeringsensors
- natural sciencesbiological sciencesecologyecosystems
- social scienceslaw
Programa(s)
Régimen de financiación
RIA - Research and Innovation actionCoordinador
NW1 3BT LONDON
Reino Unido
Organización definida por ella misma como pequeña y mediana empresa (pyme) en el momento de la firma del acuerdo de subvención.