Resultado final
Produced by tasks T7.3.1 and T7.3.2, this deliverable will include a final report on the state of the ARM-optimized Fortran compiler and mathematics libraries.
Report on application tuning and optimization on ARM platformProduced by task T6.4, this report includes the description of the tuning and optimisation for ARM-based platforms applied to a subset of the applications, and the results of their evaluation.
Final report on runtime support, optimization and programming productivity for compute accelerator and symbiotic cores.Produced by tasks T7.2.4 and T7.2.5, this deliverable will contain a report on runtime support and extensions within OmpSs for the symbiotic heterogeneous cores whilst leveraging simulation models used for heterogeneous cores. It will also report on the programmability and performance of the compute accelerator explored in T4.2 whilst using the task-based approach of OmpSs.
Final report on enhancements to message passing.Produced by tasks T7.5.1 and T7.5.4, this deliverable will provide a final report on the OmpSs communication task implementation and the TinyMPI interface with a TinyTask reference implementation, and final measurements regarding the memory copy saving techniques.
Final ReportThis report will include the following: a final publishable summary of the work completed to date covering results, the conclusions and socio-economic impact of the project, a chapter on awareness and wider societal implications as well as a report on the distribution of the Community financial contribution. It will be presented in conjunction with the final report of Dissemination (D2.5).
Report on correlated and fine tuned multi-scale simulation infrastructureProduced by task T5.7 this report will describe the final fine tuned automated multi-scale simulation workflow(s) and it will summarize the results of the correlation work to be carried thorough the final year of the project.
Final report on memory hierarchy investigations.Produced by task T3.1, this deliverable shall gather final T3.1 simulation results using high level model such as gem5, exploring specifically the energy and latency aspects. The key outcomes and recommendations shall be included in D3.8.
Final report of applications on the project test platform: performance evaluation and optimizationsThis document merges the two WP6 final deliverables into a single document. We'll have the a more comprehensive document including both i) an evaluation of the Dibona platform (from applications point of vue) and ii) a demonstration of more advanced techniques (e.g. throughput-oriented (BSC), parallel in time (UGraz), machine learning (AVL)) applied to our applications running on our prototype
Report on regions of interest as mini-application candidatesProduced by task T6.2, this report will include a list, description and justification of the regions of interest of the initial set of applications. Foreseen metrics include the percentage of time spent on those regions of interest with respect to total application execution time and lines of code compared to the full application.
Report on profiling and benchmarking of the initial set of applications on ARM-based HPC systemsProduced by tasks T6.1 and T6.2, this report will include the results of profiling and benchmarking of the initial set of applications on ARM-based HPC systems, such as the existing Mont-blanc prototype and mini-clusters, using the sets of metrics and methodology defined in T6.2.
Initial report on automatic region of interest extraction and porting to OpenMP4.0-OmpSsProduced by task T6.5, this report will include the description of the extraction process of the regions of interest defined in D6.2. It will also include the description of the strategy and issues faced during the porting of the regions of interest to OpenMP4.0-OmpSs. These codes conform the initial list of mini-applications.
Final report on OpenMP and operating system adjustments and scheduling policies.Produced by tasks T7.1.4 and T7.2.3, this deliverable will include a final evaluation of which new Linux kernel and OpenMP heterogeneous scheduling policies we found to be most suitable, including a final description of the heterogeneous devices specification.
The public website will be considered in this deliverable. It shall be maintained and updated after the initial delivery, in order to continue to provide a view of the project live.
Publicaciones
Autores:
Banchelli Gracia, Fabio F.; Ruiz, Daniel; Hao Xu Lin, Ying; Mantovani, Filippo
Publicado en:
Poster, Edición 1, 2017
Editor:
SC17
Autores:
Gundolf Haase, Dirk Martin, Patrick Schiffmann, Günter Offner
Publicado en:
Large-Scale Scientific Computing. LSSC 2017. Lecture Notes in Computer Science, vol 10665, 2017, Página(s) 499-506
Editor:
Springer International Publishing
DOI:
10.1007/978-3-319-73441-5_55
Autores:
Esteban Stafford, Borja Pérez, Jose Luis Bosque, Ramón Beivide, Mateo Valero
Publicado en:
Proceedings of Euro-Par 2017, 2017, Página(s) 710-722, ISBN 978-3-319-64203-1
Editor:
Springer International Publishing
DOI:
10.1007/978-3-319-64203-1_51
Autores:
Zhou, Huan; Gracia, Jose
Publicado en:
Edición 14, 2016
Editor:
International Workshop on Legacy HPC Application Migration (LHAM16)
Autores:
Mantovani, Filippo; Calore, Enrico
Publicado en:
Parallel Computing is Everywhere (serie: Advances in Parallel Computing), Edición 7, 2018, Página(s) 723-732, ISSN 0927-5452
Editor:
IOS Press
DOI:
10.3233/978-1-61499-843-3-723
Autores:
Xu, Ying hao; Vidal-Piñol, Miquel; Arejita, Beñat; Diaz, Javier; Alvarez, Carlos; Jiménez-González, Daniel; Martorell, Xavier; Mantovani, Filippo
Publicado en:
Parallel Computing is Everywhere (serie: Advances in Parallel Computing), Edición 5, 2018, Página(s) 642-651, ISSN 0927-5452
Editor:
IOS Press
DOI:
10.3233/978-1-61499-843-3-642
Autores:
Kallia Chronaki, Marc Casas, Miquel Moreto, Jaume Bosch, Rosa M. Badia
Publicado en:
Proceedings of ISC 2018, 2018, Página(s) 389-409, ISBN 978-3-319-92039-9
Editor:
Springer International Publishing
DOI:
10.1007/978-3-319-92040-5_20
Autores:
Marta Garcia-Gasulla, Marc Josep-Fabrego, Beatriz Eguzkitza, Filippo Mantovani
Publicado en:
Proceedings of the 47th International Conference on Parallel Processing Companion - ICPP '18, 2018, Página(s) 1-8, ISBN 9781-450365239
Editor:
ACM Press
DOI:
10.1145/3229710.3229736
Autores:
Anastasiia Butko; Florent Bruguier; Abdoulaye Gamatié; Gilles Sassatelli
Publicado en:
OpenSuCo 1 (ISC17), June 2017, 2017
Editor:
HAL
Autores:
Isaac Sánchez Barrera, Miquel Moretó, Eduard Ayguadé, Jesús Labarta, Mateo Valero, Marc Casas
Publicado en:
Proceedings of the 2018 International Conference on Supercomputing - ICS '18, 2018, Página(s) 207-217, ISBN 9781-450357838
Editor:
ACM Press
DOI:
10.1145/3205289.3205310
Autores:
Borja Perez, Esteban Stafford, Jose Luis Bosque, Ramon Beivide, Sergi Mateo, Xavier Teruel, Xavier Martorell, Eduard Ayguade
Publicado en:
2017 29th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), 2017, Página(s) 1-8, ISBN 978-1-5090-1233-6
Editor:
IEEE
DOI:
10.1109/SBAC-PAD.2017.8
Autores:
Jaume Bosch, Xubin Tan, Carlos Alvarez, Daniel Jimenez-Gonzalez, Xavier Martorell, Eduard Ayguade
Publicado en:
2017 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 2017, Página(s) 1285-1292, ISBN 978-1-5386-3408-0
Editor:
IEEE
DOI:
10.1109/IPDPSW.2017.32
Autores:
Paul Osmialowski
Publicado en:
Proceedings of the Fourth Workshop on the LLVM Compiler Infrastructure in HPC - LLVM-HPC'17, 2017, Página(s) 1-14, ISBN 9781-450355650
Editor:
ACM Press
DOI:
10.1145/3148173.3148183
Autores:
David Novo, Alejandro Nocua, Florent Bruguier, Abdoulaye Gamatie, Gillies Sassatelli
Publicado en:
2018 13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2018, Página(s) 1-8, ISBN 978-1-5386-7957-9
Editor:
IEEE
DOI:
10.1109/ReCoSoC.2018.8449376
Autores:
Manu Komalan, Oh Hyung Rock, Matthias Hartmann, Sushil Sakhare, Christian Tenllado, Jose Ignacio Gomez, Gouri Sankar Kar, Arnaud Furnemont, Francky Catthoor, Sophiane Senni, David Novo, Abdoulaye Gamatie, Lionel Torres
Publicado en:
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018, Página(s) 103-108, ISBN 978-3-9819263-0-9
Editor:
IEEE
DOI:
10.23919/DATE.2018.8341987
Autores:
Ivan Perez, Enrique Vallejo, Ramon Beivide
Publicado en:
2018 11th International Workshop on Network on Chip Architectures (NoCArc), 2018, Página(s) 1-6, ISBN 978-1-5386-8552-5
Editor:
IEEE
DOI:
10.1109/NOCARC.2018.8541147
Autores:
Adrià Armejach, Helena Caminal, Juan M. Cebrian, Rekai González-Alberquilla, Chris Adeniyi-Jones, Mateo Valero, Marc Casas, Miquel Moretó
Publicado en:
Proceedings of the 27th International Conference on Parallel Architectures and Compilation Techniques - PACT '18, 2018, Página(s) 1-12, ISBN 9781-450359863
Editor:
ACM Press
DOI:
10.1145/3243176.3243192
Autores:
Paul Caheny, Lluc Álvarez, Mateo Valero, Miquel Moreto, Marc Casas
Publicado en:
Proceedings of SC18, 2018
Editor:
ACM
Autores:
Filippo Mantovani, Fabio Banchelli
Publicado en:
Proceedings of the Workshop on Education for High Performance Computing (EduHPC) at SC18, 2018
Editor:
SC18
Autores:
Lluc Alvarez, Eduard Ayguade, Filippo Mantovani
Publicado en:
Proceedings of the Workshop on Education for High Performance Computing (EduHPC) at SC18, 2018
Editor:
SC18
Autores:
Emilio Castillo, Miquel Moreto, Marc Casas, Lluc Alvarez, Enrique Vallejo, Kallia Chronaki, Rosa Badia, Jose Luis Bosque, Ramon Beivide, Eduard Ayguade, Jesus Labarta, Mateo Valero
Publicado en:
2016 IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2016, Página(s) 413-422, ISBN 978-1-5090-2140-6
Editor:
IEEE
DOI:
10.1109/IPDPS.2016.49
Autores:
Mihail Popov, Chadi Akel, William Jalby, Pablo De Oliveira Castro
Publicado en:
Euro-Par 2016 Parallel Processing - 22nd International Conference, 2016, Página(s) 238-250, ISBN 978-3-319-43659-3
Editor:
Springer
DOI:
10.1007/978-3-319-43659-3_18
Autores:
Allande, César; Moreto Planas, Miquel; Grass, Thomas; Ayguadé Parra, Eduard; Rico, Alejandro; Armejach, Adrià; Casas, Marc; Labarta, Jesús; Valero Cortés, Mateo
Publicado en:
SC '16 Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis, Edición 1, 2016, Página(s) Article No. 45, ISBN 978-1-4673-8815-3
Editor:
IEEE Press
Autores:
Thomas Grass, Alejandro Rico, Marc Casas, Miquel Moreto, Eduard Ayguade
Publicado en:
2016 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2016, Página(s) 296-306, ISBN 978-1-5090-1953-3
Editor:
IEEE
DOI:
10.1109/ISPASS.2016.7482104
Autores:
Caheny, Paul; Saintes, Maxime; Valero Cortés, Mateo; Casas, Marc; Moreto Planas, Miquel; Labarta Mancho, Jesús José; Ayguadé Parra, Eduard; Gloaguen, Hervé
Publicado en:
Proceedings of the 2016 International Conference on Parallel Architectures and Compilation - PACT '16, Edición 1, 2016, Página(s) 275 - 286, ISBN 978-1-4503-4121-9
Editor:
ACM
DOI:
10.1145/2967938.2967962
Autores:
Valero, Mateo; Chronaki, Kallia; Ayguadé, Eduard; Casas, Marc; Rico, Alejandro; Badia, Rosa M.; Moretó, Miquel; Labarta, Jesus
Publicado en:
Proceedings of the 2016 International Conference on Parallel Architectures and Compilation - PACT '16, Edición 1, 2016, Página(s) 415-417, ISBN 978-1-4503-4121-9
Editor:
ACM
DOI:
10.1145/2967938.2976038
Autores:
Vladimir Marjanovic, Jose Gracia, Colin W. Glass
Publicado en:
2016 7th International Workshop on Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems (PMBS), 2016, Página(s) 1-10, ISBN 978-1-5090-5218-9
Editor:
IEEE
DOI:
10.1109/PMBS.2016.006
Autores:
Huan Zhou, Jose Gracia
Publicado en:
2016 IEEE 22nd International Conference on Parallel and Distributed Systems (ICPADS), 2016, Página(s) 999-1006, ISBN 978-1-5090-4457-3
Editor:
IEEE
DOI:
10.1109/icpads.2016.0133
Autores:
Pablo Fuentes, Enrique Vallejo, José Luis Bosque, Ramón Beivide, Andreea Anghel, Germán Rodríguez, Mitch Gusat, Cyriel Minkenberg
Publicado en:
Proceedings of ICA3PP 2016: Algorithms and Architectures for Parallel Processing, 2016, Página(s) 675-683, ISBN 978-3-319-49583-5
Editor:
Springer
DOI:
10.1007/978-3-319-49583-5_52
Autores:
Mariano Benito, Enrique Vallejo, Ramon Beivide, Cruz Izu
Publicado en:
2017 IEEE 3rd International Workshop on High-Performance Interconnection Networks in the Exascale and Big-Data Era (HiPINEB), 2017, Página(s) 41-48, ISBN 978-1-5090-6354-3
Editor:
IEEE
DOI:
10.1109/HiPINEB.2017.12
Autores:
Cristobal Camarero, Carmen Martinez, Ramon Beivide
Publicado en:
2017 IEEE International Symposium on High Performance Computer Architecture (HPCA), 2017, Página(s) 193-204, ISBN 978-1-5090-4985-1
Editor:
IEEE
DOI:
10.1109/HPCA.2017.26
Autores:
Alian Mohammad, Umur Darbaz, Gabor Dozsa, Stephan Diestelhorst, Daehoon Kim, Nam Sung Kim
Publicado en:
2017 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2017, Página(s) 153-162, ISBN 978-1-5386-3890-3
Editor:
IEEE
DOI:
10.1109/ISPASS.2017.7975287
Autores:
Alexandra Ferreoon, Radhika Jagtap, Sascha Bischoff, Roxana Rusitoru
Publicado en:
2017 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2017, Página(s) 109-120, ISBN 978-1-5386-3890-3
Editor:
IEEE
DOI:
10.1109/ISPASS.2017.7975275
Autores:
Pablo Fuentes, Enrique Vallejo, Ramon Beivide, Cyriel Minkenberg, Mateo Valero
Publicado en:
2017 IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2017, Página(s) 842-854, ISBN 978-1-5386-3914-6
Editor:
IEEE
DOI:
10.1109/IPDPS.2017.110
Autores:
Fillipo Mantovani
Publicado en:
EECS Seminar 2017 Energy Efficient Computing Systems, 2017
Editor:
NTNU Norway
Autores:
Alejandro Nocua, Florent Bruguier, Gilles Sassatelli, Abdoulaye Gamatie
Publicado en:
2017 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2017, Página(s) 1-8, ISBN 978-1-5386-3344-1
Editor:
IEEE
DOI:
10.1109/ReCoSoC.2017.8016146
Autores:
Raul Nozal, Borja Perez and Jose Luis Bosque
Publicado en:
Proceedings of the 17th International Conference on Computational and Mathematical Methods in Science and Engineering, Edición Volume 5, 2017, Página(s) 1561-1572, ISBN 978-84-617-8694-7
Editor:
CMMSE
Autores:
G. Oyarzun, R. Borrell, A. Gorobets, F. Mantovani, A. Oliva
Publicado en:
Future Generation Computer Systems, Edición 79, 2018, Página(s) 786-796, ISSN 0167-739X
Editor:
Elsevier BV
DOI:
10.1016/j.future.2017.09.029
Autores:
Pablo Fuentes, Mariano Benito, Enrique Vallejo, José Luis Bosque, Ramón Beivide, Andreea Anghel, Germán Rodríguez, Mitch Gusat, Cyriel Minkenberg, Mateo Valero
Publicado en:
Concurrency and Computation: Practice and Experience, Edición 29/24, 2017, Página(s) e4231, ISSN 1532-0626
Editor:
John Wiley & Sons Inc.
DOI:
10.1002/cpe.4231
Autores:
Filippo Mantovani, Enrico Calore
Publicado en:
Journal of Low Power Electronics and Applications, Edición 8/2, 2018, Página(s) 13, ISSN 2079-9268
Editor:
Multidisciplinary Digital Publishing Institute (MDPI)
DOI:
10.3390/jlpea8020013
Autores:
Patrick Schiffmann, Dirk Martin, Gundolf Haase, Günter Offner
Publicado en:
Advances in Parallel Computing Volume 32: Parallel Computing is Everywhere, 2018, Página(s) 287 - 296
Editor:
IOS Press
DOI:
10.3233/978-1-61499-843-3-287
Autores:
Paul Caheny, Lluc Alvarez, Said Derradji, Mateo Valero, Miquel Moreto, Marc Casas
Publicado en:
IEEE Transactions on Parallel and Distributed Systems, Edición 29/5, 2018, Página(s) 1174-1187, ISSN 1045-9219
Editor:
Institute of Electrical and Electronics Engineers
DOI:
10.1109/TPDS.2017.2787123
Autores:
B. Pérez, E. Stafford, J.L. Bosque, R. Beivide, S. Mateo, X. Teruel, X. Martorell, E. Ayguadé
Publicado en:
Journal of Parallel and Distributed Computing, Edición 125, 2019, Página(s) 45-57, ISSN 0743-7315
Editor:
Academic Press
DOI:
10.1016/j.jpdc.2018.11.001
Autores:
Mihail Popov, Chadi Akel, Yohan Chatelain, William Jalby, Pablo de Oliveira Castro
Publicado en:
Concurrency and Computation: Practice and Experience, 2017, Página(s) e4190, ISSN 1532-0626
Editor:
John Wiley & Sons Inc.
DOI:
10.1002/cpe.4190
Autores:
Kallia Chronaki, Alejandro Rico, Marc Casas, Miquel Moreto, Rosa M. Badia, Eduard Ayguade, Jesus Labarta, Mateo Valero
Publicado en:
IEEE Transactions on Parallel and Distributed Systems, Edición 28/7, 2017, Página(s) 2074-2087, ISSN 1045-9219
Editor:
Institute of Electrical and Electronics Engineers
DOI:
10.1109/TPDS.2016.2633347
Autores:
J. Wanza Weloli, S. Bilavarn, M. De Vries, S. Derradji, C. Belleudy
Publicado en:
Microprocessors and Microsystems, Edición 53, 2017, Página(s) 68-80, ISSN 0141-9331
Editor:
Elsevier BV
DOI:
10.1016/j.micpro.2017.06.019
Autores:
Huan Zhou, José Gracia
Publicado en:
International Journal of Networking and Computing, Edición 7/2, 2017, Página(s) 136-153, ISSN 2185-2839
Editor:
International Journal of Networking and Computing
DOI:
10.15803/ijnc.7.2_136
Autores:
Fuentes Sáez, Pablo
Publicado en:
TDR (Tesis Doctorales en Red), Edición 1, 2017
Editor:
University of Cantabria
Autores:
Nozal, Raúl; Bosque, Jose Luis; Beivide, Ramón
Publicado en:
Edición 3, 2018
Editor:
Cornell University Library
Autores:
Daniel Ganellari, Gundolf Haase
Publicado en:
Proceedings of the PhD Forum (posters) at ISC 2018, 2018
Editor:
ISC 2018
Autores:
Alban Lumi, Gundof Haase
Publicado en:
Proceedings of the Research Paper session at ISC 2018, 2018
Editor:
ISC 2018
Autores:
Ruiz, Daniel; Calore, Enrico; Mantovani, Filippo
Publicado en:
UPCommons, Edición 1, 2017
Editor:
UPC
Autores:
Joseph Schuchart, Mathias Nachtmann, José Gracia
Publicado en:
Scaling OpenMP for Exascale Performance and Portability, Edición 10468, 2017, Página(s) 156-168, ISBN 978-3-319-65577-2
Editor:
Springer International Publishing
DOI:
10.1007/978-3-319-65578-9_11
Autores:
Joseph Schuchart, Keisuke Tsugane, José Gracia, Mitsuhisa Sato
Publicado en:
Evolving OpenMP for Evolving Architectures - 14th International Workshop on OpenMP, IWOMP 2018, Barcelona, Spain, September 26–28, 2018, Proceedings, Edición 11128, 2018, Página(s) 3-17, ISBN 978-3-319-98520-6
Editor:
Springer International Publishing
DOI:
10.1007/978-3-319-98521-3_1
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