Final Report Summary - MORGAN (Materials for Robust Gallium Nitride)
Executive Summary:
PUBLISHABLE SUMMARY
The MORGaN project was aimed at developing new materials for electronic devices and sensors that could operate in extreme conditions, especially high temperatures, highly corrosive solutions and high electric fields. This was based on exploiting the excellent physical properties of diamond and gallium nitride (GaN) based heterostructures for active and sensing devices. The packaging and metallisation of electronic devices or sensors based on these novel materials are equally important considerations in extreme conditions and environments. In addition to chemical stability, metal contacts must be stable and the package must be thermally compatible with the device requirements. Advanced 3D ceramic packaging and new metallisation techniques based on MN+1AXN alloys were also explored.
The project was successful and led to many outstanding outcomes:
* Si/polydiamond composite substrate development has been far more difficult than first expected but the MORGaN Consortium is quite satisfied by the first European demonstration of 2-inch wafers.
* The direct growth of GaN on single crystal and polycrystal diamond was studied. 2D electron gas confinements were mastered on both type of crystalline diamond structure (World premiere).
* The development of GaN growth on a variety of substrates (sapphire, silicon carbide, silicon, composite) using specific compliant layers and nucleation scheme or interlayer to accommodate crystalline and thermal expansion mismatches.
* The first HEMT obtained by direct growth of a GaN heterostructure on single crystal diamond was demonstrated which exhibited microwave operation with cut-off frequencies in the 40GHz range (World premiere).
* InAlN/GaN HEMT growths on composite Si/polydiamond composite substrate were realised.
* The first HEMT with the upper surface coated with nanocrystalline diamond (NCD) showing current gain cut-off frequencies in 40GHz range.
* In the sensing area high temperature pressure and electrochemical sensors were developed including their associated packaging. A tight interaction between the Academics and SME has been a real asset to achieve working sensors. Sensors working up to 80bar were demonstrated and testing temperatures up to 450°C was utilised. Excellent electrochemical sensors with fast reacting time were demonstrated.
* A robust packaging process based on ceramic materials and silver interconnects has been developed. The packaging technology has been successfully temperature cycled from 22°C to 650?C.
* Demonstration of efficient 3D heat exchangers using copper based on ink-jet technology.
* InAlN/GaN interest was confirmed for microwave applications with active devices capable of attaining 6.6W/mm at 3.5GHz with power added efficiency (PAE) of 70% in Continuous Wave (CW). Demonstrations of output power of 180W in CW with PAE of 35% and up to 320W were obtained. This is a world record for a InAlN/GaN HEMT.
* MORGaN gathered leading partners in physical and thermal simulation, detailed characterization and device modelling. This set of scientific activities has been very important to provide the optimum research direction, to prepare and to design the required components.
* Training was included in MORGaN and that was an efficient method to provide state of the art expertise to PhD students and young scientists.
* Intense dissemination activities were launched with 27 articles and more than 175 presentations at major events.
Project Context and Objectives:
PROJECT OBJECTIVES
INTRODUCTION
In general for electronic sensors and devices, conditions that cannot be met by Si may be called harsh. The harsh environment can be external, for example high temperature or pressure, or could be internal to the device, as a consequence of power dissipation under high current flow at high bias. Devices and sensors designed to operate in such environments need new semiconductor materials which are stable, especially at high temperature and have substrate and package combinations that enable rapid heat extraction or capability to withstand high temperature. Chemical inertness is also an advantage, especially if one wants to monitor highly corrosive chemical agents. For example, Si MOSFET operation is restricted to 450°C due to its low energy band gap .
Diamond has been known for centuries for its excellent optical and mechanical properties. Another property of diamond, which is less well known to the man in the street, is the tremendous thermal conductivity, reaching 2,000 Wm-1°C-1 for mono-crystal, which is the highest of any other solid material. It is followed by silicon carbide and metals like copper, which show a thermal conductivity 4 to 5 times lower. As such, diamond is potentially the ultimate substrate for many high temperature or extreme power applications.
Gallium nitride (GaN) alloys were studied intensively 30 years ago but breakthroughs were demonstrated only about 15 years ago in optical applications (e.g. blue LED, blue laser, lightning, etc.) and more recently have demonstrated impressive power handling from DC to microwave operation with breakdown field reaching more than 5MV cm-1. These wide band gap materials are suitable for high voltage (>10 kV) switching applications. This is crucial for the next generation of efficient long distance power distribution systems required for geographically dispersed renewable energy sources. It is also highly desirable in many other, traditionally inefficient, electrical energy conversion systems, such as those used in trains. As a result a GaN/Diamond composite could replace silicon for extreme environments.
The III-N system has other desirable properties for sensor applications in extreme environments. It is the only highly polar semiconductor matrix that has ceramic-like stability and can form heterostructures. It has the highest spontaneous polarisation (for AlN), with a Curie temperature above 1000?C (for AlN). For example, a lattice matched III-N heterostructure with a built-in polarisation discontinuity is expected to enable transistor action above 1000?C. Furthermore, the high surface stability of AlGaN/GaN heterostructures enables gas sensing at 800?C , rivalling current SiC gas sensors.
The MORGaN project addressed the need of new materials for solid state electronic devices and sensors that operate in extreme conditions, especially high temperatures, highly corrosive solutions and high electric fields. These materials will have to take advantage of the excellent physical properties of diamond and gallium nitride (GaN) based heterostructures. The association of the two materials was expected to give rise to the best materials and devices for ultimate performances in extreme environments.
The packaging and metallisation of an electronic device or sensor were believed also equally important to ensure device operation in extreme conditions and environments. Indeed metal contacts must be stable and the package must be thermally compatible with the device requirements and chemically stable. Advanced 3D ceramic packaging and new metallisation techniques based on the emerging technology of MN+1AXN alloys were also to be explored.
The project covered fundamental material science researches, sensor and microwave device development including the appropriate packaging. All these activities were strongly supported by many teams involved in state of the art material characterization, simulations (mechanical, thermal, electronic transport and trapping effect), linear and non-linear circuit-oriented modeling, circuit design, and associated measurement (electrochemical, electromechanical, electrical (DC, pulsed, S-parameters, load-pull)), etc.
SUMMARY OF MORGAN TECHNICAL OBJECTIVES
MORGaN included the following main objectives as stated in the original description of work:
Semiconductor materials:
* Development of polycrystalline diamond/silicon sandwich hybrid substrates.
* Development of innovative compliant heterostructure to grow low defect density GaN film, including AlGaN alloys.
* Growth optimisation of InAlN/GaN heterostructures for electronic and sensing applications to be used under extreme conditions, and that on different substrates to achieve high performance keeping in mind the use in demanding equipment.
Thermal heat spreaders:
* Development of nanocrystalline diamond heat spreaders on active devices to decrease the device temperature.
Interconnection and packaging-type issues:
* Optimisation of stable MN+1AXN metallic interconnection to ensure use at high temperature,
* Development of innovative 3D manufacturing for sensors and high power applications.
Materials for sensors:
* Materials for pressure sensors at high temperature for temperatures above 500°C and possibly up-to 1000°C,
* Materials for analysing highly corrosive electrolytes.
Power applications:
* Development of HEMT heterostructures and related building blocks (from semiconductors, processing building blocks, heat exchangers, circuits and packaging) to deploy technologies required for up to 1-kW application for base stations.
All these studies were realized in the frame of a large consortium including 23 partners capable of carrying out deep material studies, physical and electrochemical simulations and modeling activities, and to engage studies on degradation phenomena. The materials development had to be compatible to 100mm diameter wafers or even larger for later on industrialization. Evidently such manufacturing development would not have taken place in this research project. The participation of SME and leading companies in diamond materials, epitaxial growth, sensors and power microwave electronics secured the use of technologies in case of success.
These materials development were aiming to increase the product durability (energy production, microwave power, aerospace telecommunication) and through sensors to improve process controls, decrease the risk of industrial hazards and increase safety.
MORGAN PROJECT WORK BREAKDOWN
Figure 1. MorGaN project structure
The project work was broken down in 11 work packages. Figure 1 shows the 8 different technical work packages and their main tasks. Additionally 3 work packages were addressing the training of scientists, the dissemination and the innovation. The technical achievements of MORGaN are listed thereafter. All the planned work has been carried out. However as expected in such a large project, some delays were faced by the Consortium. Back up solutions were decided to decrease the risk levels, and these have been quite effective. The MORGaN project was completed on time, which is intrinsically a performance when considering the challenging objectives. The contribution of all Consortium members has to be acknowledged for that achievement.
Project Results:
WP1 DIAMOND-BASED SUBSTRATES (E6)
Leader : Element Six (E6) Partners : MFA, ITE, STU
WP1 HIGHLIGHTS (E6)
* First working GaN transistor on (111) single crystal diamond and the demonstration of direct GaN growth on polycrystalline CVD diamond
* Developed a commercial capability for up to 150 µm of CVD diamond on 100 mm diameter single crystal Si wafers > 525 µm in thickness, with a thermal conductivity measured to be >1000 W m-1 K-1.
* Over 80 Si diamond composite wafers have been produced by WP1.2 for the MORGaN project work.
* Ultra-thin (<50 nm) Si layer on diamond used for hetero-epitaxial gallium nitride growth; the ultimate limit of the composite substrate technology. PCT/EP2011/060503 patent application filed 22/06/11.
* Developed 50 mm diameter, 2 µm silicon on 50 µm diamond composite wafer fabrication technology.
TASK 1.1. DIAMOND FOR DIRECT GROWTH (STARTING DATE : M1)
Leader : E6
Work package (WP) 1.1 supplied bespoke surface finishes on commercially available polycrystalline and single crystal diamond products for direct hetero-epitaxial growth of gallium nitride. Single crystal diamond samples were prepared with (100), (110) and (111) orientation for a systematic study of its effect on gallium nitride growth. Samples supplied to project partners by WP 1.1 include:
? 20 off polycrystalline 50 mm diameter wafers with Ra < 1 nm in local regions
? 25 off (100) & (110) orientated single crystal diamond 4.5 x4.5 mm plates
? 45 off (111) orientated single crystal diamond 3 x 3 mm plates
Single crystal diamond samples with a (111) orientation were specially prepared for MORGaN project partners and are not generally commercially available. The hardness of diamond is anisotropic with the (111) direction ~10% harder than the other (soft) directions. (111) orientation is typically processed with miscut of between 2° to 4°. The initial set of samples were processed to have a typical surface roughness (Ra) of <10 nm. In order to further investigate the growth of GaN on (111) diamond a series of 10 (111) samples were prepared with, a controlled tilt towards the (1-10) direction, and specific miscut angles of 0°, 2°, 3° and 4°. This level of control of tilt and miscut angle control in (111) samples was specially developed for the MORGaN project.
TASK 1.2. COMPOSITE SILICON/POLYCRYSTALLINE DIAMOND SUBSTRATES (STARTING DATE : M1)
Leader : E6
The silicon polycrystalline diamond substrate comprises of a CVD diamond wafer with a thin single crystal silicon surface bonded to it. Such a structure enables the indirect heteroepitaxial growth of compound semiconductor materials onto the polycrystalline CVD diamond. Diamond has an ideal set of heat spreading characteristics perfectly suited for high power density electronics applications such as radio frequency (RF) devices. Originally it was planned that WP 1.2 would deliver 50 mm diameter silicon on diamond composite wafers, to the MORGaN consortium for GaN heteroepitaxial growth, from month 3 to 6 into the project. This required WP 1.2 to develop a synthesis capability on single crystal (111) silicon and a capability to thin the silicon layer to less than 3 µm.
WP 1.2 developed a 100 mm diameter CVD diamond synthesis capability using microwave plasma enhanced technology, with a typical example shown in Figure 2.
The primary advantage of using microwave synthesis technology is that it results in a higher thermal conductivity grade than is available by the hot filament technique. However, there are some technical difficulties in preparing diamond layers using microwave synthess techniques on thin silicon substrates, as the high power density of the microwave plasma process and the high stresses generated by joining diamond layer to the silicon wafer can cause the wafers to buckle and shatter. WP 1.2 developed strategies to mitigate these issues and as result diamond on silicon composite (DOSC) wafers, with the following specifications, are now commercially available from E6.
Si Substrate Specifications
* 100 ± 2 mm Si wafers >525 µm
Diamond Thickness Range
* 1 µm to 140 µm
Diamond Thickness uniformity
* 100 mm wafer uniformity ±10%
* 50mm wafer uniformity ±5%
Figure 2. A typical 100 mm DOSC wafer ex-synthesis, viewed from the diamond side, with the diamond thickness values for 17 measurement points superimposed on the surface; illustrating the excellent uniformity of the wafers.
Once the DOSC wafer fabrication process had been developed, the plan was to rapidly develop a thinning process to turn the 100 µm thick diamond on 525 µm thick silicon composite wafers into 2µm thick silicon on 100 µm thick diamond composite wafers. How difficult it would be to develop a thinning process was under-estimated by both WP 1.2 and the consortium as a whole. The delivery of these 50 mm diameter substrates to the consortium took WP 1.2. 30 months. This resulted severe disruption to the rest of the project. It was realized that an unconventional approach to thinning the silicon was needed in order to deliver less than 100 µm thick silicon on polycrystalline diamond wafers. Both the stress in the silicon layer had to be minimized and the adhesion between the diamond and the silicon interface maximized. These demands presented significant technical challenges.
.As grown, a 100 µm diamond layer creates a tensile stress in the 525 µm thick silicon substrate that peaks near the interface at 130 MPa as Figure 6 illustrates it.
However, the stiffness of the diamond forces the silicon in to compression at the actual interface. In (111) orientated Si, these forces can be used to trigger cleavage of the (111) plane at a depth close to the interface plane. Since the adhesion of the CVD diamond and the silicon layer is relatively strong, a thin layer of silicon remains adherent to the diamond layer. Diamond silicon composite wafers can easily be cleaved when in the 10 x 10 mm size range as shown in Figure 3 Left. GaN growth has been demonstrated on the substrates produced via this mechanism as illustrated in Figure 3 right. This was recognized as an exceptional result as it is a demonstration that the ultimate thickness of the silicon layer can be less than 100 nm whist still maintaining the crystallographic orientation. However; controlling the thickness of the Si layer was found to be extremely difficult and this technique was not developed further.
Figure 3. Left A 10 x 10 mm silicon on diamond substrate prepared using the cleaving method. The Si layer can be as thin as 50 to 100 nm and at the edges as thick as 200 µm in the same sample,. Right A Cross section of a GaN epitaxial structure on CVD diamond, grown on a cleaved Si(111) surface. The GaN is c plane (200) with an X-ray rocking curve FWHM of 0.95°.
In the last year of the project, a route for fabricating of silicon on diamond composite substrates was found. This method exploited diamond growth on bespoke specification silicon on insulator (SOI) substrates. Finite element modeling was used to study the effect of different combinations of thicknesses of SOI wafers and diamond layers on the tensile stress component of the silicon layer at the interface. This drove an experimental program looking at how to make the handle silicon wafer thinner and use thinner diamond layers. Eventually; this leads to the use of an anisotropic chemical etching technique to thin the handle silicon wafer. Three 50 mm diameter silicon on diamond composite substrates have been produced using this process. These wafers along with over 60 other smaller samples have been used to grow heteroepitaxial GaN layers and a working InAlGaN - GaN HEMT transistor has been grown by WP 2 and fabricated by WP 5.
The prospects for producing a silicon diamond composite substrate that is larger than 50 mm in diameter depend on being able to increase the diamond layer thickness and to mitigate the effect of increasing the tensile stress in the silicon layer. Their usefulness for high power GaN devices is now dependent on demonstrating that this approach can deliver a real benefit for GaN device operation and be available in the sizes and specifications, particularly flatness, required by the compound semiconductor industry.
Figure 4. Left. A 55 mm diameter composite diamond silicon wafer with 50 µm diamond and 2 µm (111) silicon layer. Right. A cross section SEM, provided by WP1.3 of a composite substrate with a GaN structure grown on the silicon layer.
TASK 1.3. DIAMOND BASED SUBSTRATES - CHARACTERISATION (STARTING DATE : M1)
Leader : MFA Partners : E6, ITE, STU
WP 1.3 provided the basic microscopy and characterization techniques required to aid the materials development. MFA developed specialist cross sectioning techniques required for dealing with diamond materials. The ability to perform high resolution transmission electron microscopy (HRTEM) on diamond samples without introducing damage or graphitization is a world class capability. Detailed characterization of the diamond to silicon interface was undertaken to enable the optimization of the adhesion at the silicon diamond interface. In Figure 5 the HRTEM image of the interface, together with the carbon and silicon element maps shows that the transition between the CVD diamond and the silicon occurs abruptly via a 5 nm SiC cubic phase and a 10 nm amorphous zone where there is limited mixing of silicon with carbon before the diamond layer is established.
Figure 5. Silicon diamond interface region at atomic resolution level, with the silicon map left, the HRTEM center and the carbon map right. This illustrates how abrupt the interface is with the first cubic SiC phase formed on the silicon surface, an amorphous transition zone and the polycrystalline diamond layer rapidly forming with little silicon contamination of the diamond layer.
STU explored the strain state of the diamond silicon interface using micro-Raman spectroscopy. Both diamond and silicon have distinct Raman peaks and the shift in the position of the peak is known to be proportional to the strain state. Using a microscope to focus the spectrometer the Raman response can be measured as a function of position. By preparing cross sections of the material STU were able to measure the strain state across the interface. A tensile stress in the silicon of ~130 MPa and the abrupt transition into compressive strain in the diamond layer was measured. Thus confirming the modeling results made in WP1.2.
Figure 6. Left. The tensile stress in the silicon layer as a function of distance to the interface with the diamond as measured by peak shift of the Si Raman peak. Right The compressive stress in the diamond layer using the same technique. The abrupt change in compressive to tensile stress together over the ~20 nm length of the interface was exploited when making the cleaved surface silicon on diamond composite wafers.
WP2 LOW DEFECT DENSTIY III-N MATERIALS (UOB)
Leader : UoB
Partners : AIX, FORTH, GEM, ITE, MFA, STU
The goal of WP2 was to establish new processes based on either metalorganic vapour phase epitaxy (MOVPE) or molecular beam epitaxy (MBE) for growing epitaxial III-Nitride layers for a range of new application of GaN based devices in harsh environments or capable of operating under harsh conditions where power dissipation will degrade device performance.
WP2 HIGHLIGHTS (UOB)
o Demonstration of crack-free GaN layers grown by on compliant substrates of diameter > 50 mm
o World first growth of GaN epitaxial layers by rf-MBE directly on polycrystalline diamond substrates
o World-first demonstration of cantilevers suitable for high temperature operation formed by epitaxial lateral overgrowth (ELOG)
o The epitaxial growth of device grade GaN/AlGaN hetero-epitaxial structures on composite Si/polycrystalline diamond substrates of ?50 mm diameter
o Achievement of rapid reductions in defect density in thin GaN layers grown on composite Si/polycrystalline diamond substrates
TASK 2.1. COMPLIANT SUBSTRATE TECHNOLOGY (STARTING DATE: M1)
Leader : UoB Partners : AIX, FORTH, GEM
The concept of a compliant substrate is based on the introduction of a thin nanostructured layer in the epitaxial structure to absorb some or all the strain introduced by a combination of lattice mismatch between the III-Nitride epitaxial layers and a non-native substrate, for example Silicon, and of the difference of coefficient of thermal expansion on cool-down from the temperature at which the III-Nitride layers are grown. The results presented here show the main advances achieved in this technology in the MORGAN project.
Growth of compliant structures by MOVPE
Compliant GaN layers formed on 50 mm Si substrates were delivered early in the project (deliverable 2.1.1) for detailed materials analysis. The innovation here was the etching through thin GaN and AlN layers, the latter acting as a growth nucleation layer that prevents chemical reaction with Ga and Si to exploit the lower stiffness of Si to maximize its scope for absorbing strain. The strain absorption was successful but inversion domains (regions of opposite polarity) tend to form. A combination of detailed TEM, SEM and SIMS analyses in WP2.4 revealed that the inversion domains coincided with small regions of high Si content in the coalesced GaN layer. These regions were shown to be related to either incomplete coverage of the Si layer by AlN or mechanical failure of the Si nano-pillar, i.e. cracking. The research then focused on patterning the Si substrate prior to growing the AlN nucleation layer. Whilst the GaN layer is not fully planarised, its thickness at 1.5 µm far exceeds the value (0.7 µm) at which a GaN layer is predicted to crack if grown on a Si substrate without stress mitigating layers. The Si nano-pillars absorb much of the strain. The structure is encapsulated by AlN eliminating the problem Si leakage and inversion domain formation. Finally, the regions between the nano-pillars are partially infilled, to reduce the air gaps in the structure and thus the barrier to heat conduction, an objection to deploying nano-pillar compliant layers in epitaxy designed for power electronics.
Growth of compliant structures by MBE
FORTH demonstrated the compliant substrate concept by growing rf-MBE nano-pillars and then coalescing them into a continuous GaN epi-layer. Figure 7(a) shows the pre-patterned SiNx growth mask used, with ?300 nm diameter windows through to the underlying GaN template. Figure 7(b) shows the arrays of smaller diameter nano-pillars that grow in the windows and Figure 7(c) shows the early stage of coalescence of the tops of the nano-pillar arrays. AFM measurements on the surface the platelets that start growing reveal a surface roughness of only 2-3 nm, to reveal how the rf-MBE process enables the much more uneven surface that exists at the nano-pillar cluster stage can be transformed into a high quality GaN epitaxial template.
Nano-ELOG approach
A key aspect of the compliant substrate concept is the reduction in the density threading dislocations that can be achieved, thereby improving material quality. This is best shown by the following work carried out jointly by Partners 1 and 20. The nanostructure used in this case is similar shown in Figure 7(a), but the epitaxial growth process used was nano-ELOG, a method in which the coalesced layer grows out laterally over the growth mask without leaving air gaps. Figure 8(a) a coalesced GaN epilayer formed by nano-ELOG and Figure 8(b) shows the a TEM image that reveals the strong dislocation bending that occurs in such structures with the results that density of threading dislocations reduces much more rapidly than would occur otherwise.
In summary, most the objectives of Task 2.1 were achieved in full. The only major deviation from the original work plan was that the compliant substrate technique was found to be unsuitable for mitigating strain in GaN epitaxial layers grown on composite Si/poly-diamond substrates though a combination of detailed simulations of the mechanical properties of the composite layer structures and measurements of the strain in Task 2.4 of the structures grown in Task 2.3. The person-months were re-allocated to Task 2.3 to ensure completion of this technologically and, potentially economically important activity.
TASK2.2. MATERIALS FOR CANTILEVERS COMPATIBLE WITH HIGH TEMPERATURE (STARTING DATE : M1)
Leader : UoB Partner : FORTH
The major achievements of this task are:
o The direct growth of GaN films on poly-diamond substrates by rf-MBE without a Si(111) inter-layer resulted in sufficiently ordered layers to be suitable for sensors operating by piezoelectric effect;
o Wide wing (up to 20 ?m) ELOG grown by double dog-leg growth window technique;
o Processes for fabricating low built-in strain double clamped beams and cantilevers from double-dogleg ELOG demonstrated.
Growth of III-Nitride layers directly on poly-crystalline diamond substrates
FORTH demonstrated the growth of dense GaN films with the characteristics of epitaxial layers on poly-crystalline diamond substrates without an intervening crystalline layer (usually Si) required for epitaxial growth. Initially ~ 100 nm thick porous GaN layer was grown at a substrate temperature of 800?C using N-rich conditions (III/V ratio = 0.2). Then the III/V ratio was increased to >1 to enhance lateral growth of the nano-pillars into a coalesced film. Figure 9 shows that a dense layer is formed after the coalescence step. The XRD rocking curve in Figure 10 is characteristic of a single crystal (0001) GaN film; however the FWHM of the ? - 2? scan, at 3 deg, indicates there is still some disorder, probably from twist and tilt. The photoluminescence is from the donor-bound exciton. The FWHM of this emission line, 8 meV, indicates a good quality layer.
Figure 9. Coalesced GaN layer grown directly on a poly-crystalline diamond substrate. Figure 10. XRD of coalesced GaN layer grown by rf-MBE directly on poly-crystalline diamond.
Based on these results, it is concluded that sufficiently ordered GaN layers can be grown directly on poly-crystalline diamond substrates by rf-MBE without a Si inter-layer to be suitable for sensors operating by piezoelectric effect. These results demonstrate one of the main premises in the original MORGaN proposal.
Growth of low-strain cantilever epitaxy by ELOG
The concept here was to exploit the low strain in GaN epitaxial structures grown laterally over a growth mask as a platform from which double clamped beams and cantilevers can be formed. The method involves a synergy between microfabrication, first to create the growth mask and then to release the beams or cantilevers from the ELOG material. The ELOG wings need to be wide enough to accommodate a HEMT to act as the strain/force transducer. To maximise the lateral-to-vertical growth rate ratio, the edges of the growth mask were aligned to the lines of the [1-100] directions in the c-plane. Figure 11 illustrates the overall concept. Figure 12 shows a GaN ELOG structure grown using the redeveloped growth mask. The width of the ELOG wings in this sample averaged 9 µm and the thickness variation was reduced to a level that structures could be committed to device fabrication. The maximum growth wing width achieved using the new process was 20 µm, more than enough to accommodate a HEMT transducer. Figure 13 shows a fully released beam clamped at each end of the double-dogleg structure and Figure 14 shows cantilevers formed from the ELOG material. The residual strain in the epitaxy arising from being clamped at each end caused some of the beams to arch upwards, but the distortion was relatively small. The cantilevers were unbent, demonstrating the basic premise of the ELOG approach, namely that the devices will operate as piezoelectric sensors with very low in-built strain, making their calibration easier.
Figure 11. Left: Schematic illustration of the double dogleg growth window (black line), the area of ELOG GaN (light grey) from which cantilevers are formed. Right: first release step involving photolithography and ICP etching Figure 12. Second series GaN ELOG grown from a double-dogleg growth window using the revised growth mask.
The scope for deflecting the ELOG beams and cantilevers was assessed using a probe mounted on a nano-positioner programmed to oscillate up and down by ?1-5 µm. The motion of the probe was such that the device was subject to lateral and vertical forces. The movement of the beams and cantilever was detected by its (a) physical movement and (b) shifts in the interference fringes arising from reflections from the GaN template below and the cantilever itself. Both device types readily oscillated without damage. The combined vertical and lateral movement was up to ?1-5 µm, representing deflections of ?5% of the length of the structure. Therefore, ELOG cantilevers and beams not only have low or zero in-built strain, there are mechanically robust. This demonstrated the other main objective of Task 2.2.
Figure 13. Double clamped beams after removing the SiNx growth mask.
Figure 14. Released cantilevers after removing the SiNx growth mask.
TASK2.3. GAN TEMPLATE ON SI/POLY-DIAMOND, POLY-DIAMOND AND NANO-DIAMOND SUBSTRATES (STARTING DATE: M6)
Leader : UoB Partner : AIX, FORTH
The main achievements of this task are:
o Demonstration of a method for fabricating crack-free composite Si/poly-diamond substrates suitable for the epitaxial growth of III-Nitride hetero-epitaxial structures by MOVPE in conjunction with WP1;
o Demonstration of epitaxial growth of crack-free III-Nitride hetero-epitaxial structures including a 0.5 µm thick GaN layer by MOVPE on composite Si/poly-diamond substrates of ?50 mm diameter;
o Characterisation work carried out in work package WP2.4 revealed there was a rapid reduction in the density of threading dislocations in the GaN layer, to indicate that device-grade epitaxial layers could be grown on these complex substrates;
o Demonstration of the conditions required for growing III-Nitride hetero-epitaxial layers on composite Si/poly-diamond including material for the GaN high electron mobility transistor (HEMT) in WP3.
The first "epi-ready" composite (111) Si/poly-diamond (PD) substrates were 10?10 mm and 20?20 mm squares and consisted of an ultra-thin layer of Si (111) on which a thick PD layer was deposited. First, the growth of a crack-free AlN nucleation layer that prevents any chemical reactions between the Si and Ga was demonstrated. Next, an Al0.2GaN layer (~50nm) and a GaN top layer of thickness between 300-700nm were grown over the AlN nucleation layer. X-ray diffraction (XRD) measurements were then performed and the GaN layer shown to be of high quality. The FWHM of its rocking curve is ~1100arcseconds (Figure 15), which is comparable to that of GaN grown on Si (111) substrates.
Figure 15. Rocking curve of GaN (0002) (thickness: 700nm) of a GaN/Al0.2GaN/AlN/Si(111)/PD multilayer structure.
The strain in the GaN/AlGaN/AlN/Si/PD multilayer structure was assessed at STU by micro-Raman scattering. It was found the ultra-thin silicon layer has acted as a complaint buffer layer between the high stiffness PD and the III-nitride layers without introducing a nanostructureaa. The Si (111) layer was severely compressed by the III-nitride multi-layer structure, with a compressive stress as high as -130MPa whilst the top GaN layer remained under a tensile stress of 503MPa, which is induced by the PD layer through the Si layer, the AlN layer and the Al0.2GaN layer. This stress interaction within the multilayer structure means additional compressive stress must be added designing the AlN-to-GaN alloy grading to introduce compressive strain between GaN and AlN. In this way it was found that crack initiation was successfully avoided and thicker layers of III-nitrides can be grown, enabling reductions in the threading dislocation density (TDD).
A third series of composite Si/poly-diamond substrates were provided to UoB and EPFL to enable the optimisation of the MOVPE growth of the strain-balancing heterostructure and subsequent growth of the GaN templates (UoB) and a full HEMT structure at EPFL, also grown by MOVPE. Figure 16 shows the successful growth of a crack-free AlN/AlGaN/GaN heterostructure on a wafer scale. The total thickness of the heterostructure is 1.2 µm. This is a break-through result and was followed up by the growth of a similar crack-free structure on a 48 mm diameter composite substrate.
Figure 17 shows a TEM image measured by MFA of a similar hetero-epitaxial structure. Whilst the defect density in the AlN nucleation layer is high, the TDD rapidly decreases with the GaN layer thickness to a value comparable to that found in GaN layers of similar thickness grown on Si(111) substrates, indicating that device-grade layers can be grown on such complex substrates. Finally, EPFL grew by MOVPE a mirror-like HEMT structure without cracks on a poly-diamond/Si(111) substrate. TUU then processed this structure into unpassivated HEMTs with 0.2µm gate-length. The resulting devices showed nearly 1A/mm Idmax with good pinch-off characteristics indicating that the Si layer was non-conducting, a requisite for high power devices.
Figure 16. Crack-free GaN/AlGaN/AlN grown on a 45 mm diameter composite Si/PD substrate. Figure 17. TEM images of Crack-free GaN/AlGaN/AlN grown on a 45 mm diameter composite Si/PD substrate.
TASK2.4. LOW DEFECT DENSITY SUBSTRATES AND STRUCTURES MATERIAL CHARACTERISATION (STARTING DATE : M3)
Leader : STU Partners : ITE, MFA, UoB
The successes in Tasks 2.1 2.2 and 2.3 could not have been achieved without outstanding characterization work and the excellent coordination with the technology teams achieved by the Task leader. Figure 8 toFigure 16 show examples of the characterisation results. Other examples and the role they played in underpinning successful outcomes in Task 2-1-2.3 are outlined here. Measurements of wafer bow at ITE enabled the advances both in the composite substrate technology developed in WP1 and in the subsequent growth of III-Nitride layers of device quality (Task 2.3). Further, it provided a basis for understanding the micro-Raman measurements of the strain in the III-Nitride layers grown on composite substrates, to enable the growth of thicker GaN layers. Figure 18 shows maps of the tensile stress in different III-Nitride heterostructures grown on composite Si/poly-diamond substrates determined by micro-Raman at STU. Figure 17 shows an example of the TEM analysis performed at MFA that underpinned optimisation of AlGaN stack incorporated into III-Nitride heterostructure to enable a dual purpose to be met, namely strain balancing and reducing the TDD.
Figure 18. Tensile strain in GaN/AlGaN/AlN heterostructures of different composition, alloy grading and thickness grown on Si(111)/poly-diamond substrates.
Other characterization work carried out included
* Detailed SEM and cathodoluminescence studies of coalesced GAN layers to assess defects
* SIMS characterization to assess semiconductor alloy composition and doping densities
* Photoluminescence
* X-ray diffraction analysis.
WP3 INALN HETEROSTRUCTURES (AIX)
Leader: AIX Partners: ATL, UoB, EPF, FOR, ITE, MF, STU
The main objective of WP3 was the realization of high quality InAlN/GaN heterostructures by MOCVD and MBE with optimized physical properties on all kind of different MORGAN relevant substrates. The consortium had selected three different substrates which were expected to have the potential to fulfil the MORGAN requirements in terms of thermal conductivity, high resistivity and mechanical and chemical stability: SiC, diamond and GaN-based compliant substrates.
The aim was to develop and optimize InAlN/GaN heterostructures on all these substrates. Best device structures should be supplied for device processing, optimization of the passivation and for the subsequent deposition of nano-crystalline diamond within the work packages WP5 to WP8.
To achieve the WP3 objectives a combination of advanced epitaxial growth methods and material analysis techniques have been used. The work package was divided into 5 tasks. The first 3 tasks were devoted to the MOCVD and MBE process development on the different substrates. In WP3.1 InAlN HEMT structures were optimized on SiC as a reference for the advanced substrates. Within this task most of the wafers have been produced as material basis for high power devices processed in WP8. WP3.2 has focused on epitaxy of InAlN based structures on hybrid and low cost substrates for sensor applications and in WP3.3 the direct growth on diamond has been explored. Finally the epitaxial processes have been evaluated regarding their potential for the mass production of InAlN/GaN heterostructures within WP3.4. All characterization work has been focused in WP3.5.
in WP3.5.
WP3 HIGHLIGHTS (AIX)
* MOCVD process development and optimization for AlInN/GaN/SiC HEMT structures. Reproducible production of AlInN/GaN HEMT structures with high resistive buffers and sheet resistance values below 200 ?/?
* More than 100 wafers, SiC and sapphire, have been delivered to WP4 to WP8.
* Demonstration of first MOCVD HEMT structure on composite poly-diamond substrate.
* Development of optimized AlInN HEMT structures on low cost substrates Si and sapphire for pressure sensors and chemical sensors, respectively.
* Demonstration of single crystalline (0001) GaN film growth by MBE on all three different SC diamond substrate orientations.
* First successful operation of an AlGaN/GaN HEMT on SC diamond and of an AlN/GaN HEMT on polydiamond substrates.
* Successful process transfer from 2" R&D MOCVD equipment to different MOCVD multi large wafer production systems for SiC, sapphire and Si substrates.
* Development and validation of AlInN MOCVD growth model.
* Extensive characterization to support the epitaxial material development.
TASK 3.1. EPITAXY ON BULK SIC (STARTING DATE : M1)
Leader : ATL Partner : AIX
The MOCVD growth process of InAlN/GaN HEMT structures was developed on sapphire and SiC substrates by ATL and AIX. The development of an optimized MOCVD growth process for a HEMT structure can be divided into two parts - the optimization of the buffer layer and of the AlxIn1-xN barrier. The most important properties of the buffer that need to be achieved are high crystal quality, low surface roughness and high resistivity while for the active part of the device structure material composition, crystal quality need to be controlled. AIX and ATL used the experiences from the ULTRAGAN project as starting point for the further optimization of the AlInN HEMTs structures, which consist in general of the SI SiC substrate, an about 2 µm thick GaN buffer layer followed by a 1nm thick AlN interlayer and on the top InAlN layer with varying thickness in the range 10-13nm and Indium contents from 13% - 21%. This general structure has been optimized by ATL and AIX with focus on the resistivity of the buffer, the thickness of the AlN interlayer and the thickness and composition of the AlInN barrier layer. The buffer quality has been examined by breakdown voltage measurements, the AlN interlayer and AlInN barriers have been optimized regarding highest possible sheet carrier density and mobility. Finally both partners were able to produce reproducibly AlInN/GaN HEMT structures with high resistive buffers and with sheet resistance values below 200 ?/? (figure 19).
Samples grown on sapphire and SiC were supplied for device processing and material analysis to the different partners by AIX and ATL (more than one hundred wafers delivered- see deliverables D3.1.1 to D3.1.3). Within the final reporting period still a significant improvement has been achieved by analyzing the growth conditions for the AlN interlayer. These growth conditions were found to have a strong influence on the physical properties of the InAlN/AlN/GaN HEMT heterostructures. The strain state, the growth mode, the thickness of InAlN and the electrical properties of the InAlN/AlN/GaN heterostructure are dependent on the AlN interlayer growth parameters. This is illustrated in figure 20.
Figure 19: Electrical characterization of optimized AlInN/GaN/SiC HEMT structures. The left figure shows the sheet resistance of a common HEMT structure with an average Rs value of 180 200 ?/?, the standard deviation is as low as ~1,5%. The right diagram shows the sheet carrier mobility as function of the ns value. Electron mobilities higher than 2000 cm2/Vs are possible for AlInN HEMTs.
TASK 3.2. EPITAXY ON HYBRID AND LOW-COST SUBSTRATES (STARTING DATE : M1)
Leader : EPFL Partners : ATL, AIX, FORTH, UoB
The processing of AlInN/GaN based electrochemical sensors required the possibility of mesa definition by the removal of the complete nitride stack. In order to mitigate the difficulties related to a deep GaN etch, the MOCVD growth on sapphire of AlInN/GaN high electron mobility heterostructures of reduced thickness was optimized. A 50 nm-thick AlN nucleation layer was used and the MOCVD growth conditions were tuned in order to achieve a very fast coalescence of the subsequent GaN buffer layer. The effect of a pre-growth nitridation of the sapphire surface on the heterostructure quality was also investigated. As result, we achieved fair electronic quality (µ>1100 cm2/V?s, Rsheet<400 ?/?) on HEMT structure having total thickness as thin as 120 nm.
MOCVD growth of GaN buffer structures and full AlInN-HEMTs have been optimized on Silicon (111) to be used for pressure sensors and as stating point for the growth on poly-diamond/Si(111) templates.
We performed the validation of poly-diamond/Si(111) templates developed in the frame of WP1. As expected from the higher thermal expansion mismatch with the poly-diamond, cracking issues are more pronounced on these templates than on Si(111). Nevertheless, mirror-like HEMT devices without cracks were obtained on Si/PD using a 260-nm-thick GaN buffer on 60-nm-thick AlN nucleation. Their crystalline quality is comparable to that on Si(111), as shown on the HRXRD scans of Figure 21(a). 0.2 µm gate-length devices show nearly 1A/mm Idmax [Figure 21(b)]. Their good pinch-off behavior shows that the 3 µm-thick Si(111) layer of the PD/Si template has good insulating properties after the poly-diamond growth fabrication step.
(a) (b)
Figure 21: (a) HRXRD Omega-2theta and Omega scans of an AlInN-HEMT structure grown on Poly-diamond/Si(111) template, compared with an identical structure grown on a Si(111) wafer. (b) I-V characteristics of a 0.2 µm-gate of the HEMT on Poly-diamond/Si(111) template.
TASK 3.3. DIRECT GROWTH ON DIAMOND (STARTING DATE : M1)
Leader : FORTH Partners : AIX, EPFL, UoB
FORTH and EPFL studied the heteroepitaxy of GaN by nitrogen rf plasma source MBE (RF-MBE) and NH3 gas source MBE (NH3-MBE), respectively, on single crystalline {100}, {110}, {111} and polycrystalline {110} and {111/311} diamond substrates. EPFL achieved the growth of crack-free (0001) GaN films, using NH3-MBE, on SC diamond {111} substrates, using a strain engineered interlayer. The typical RMS roughness was 0.6 nm on a 2×2 µm2 AFM image and the dislocation density about 8×109 cm-2. Hall effect measurements, at room temperature, revealed mobility and ns values of 750 cm2V-1s-1 and 1.4?1013 cm-2, respectively, for an AlGaN/GaN heterostructure, grown on top of a GaN buffer layer. This material was used to demonstrate the first GaN HEMT transistor on a diamond substrate. Idmax was 0.73 A/mm on devices with 0.2 µm-gate length, ft was 21 GHz and fmax 42 GHz.
FORTH demonstrated the growth of single crystalline (0001) GaN films on all the three different SC diamond substrate orientations. AFM scans revealed smooth GaN surfaces with RMS roughness of 1.6 nm. All GaN films were found to be under tensile stress, attributed to the different thermal expansion coefficients of GaN and diamond. Nitridation of the SC diamond substrates improved significantly the microstructure of the GaN films and eliminated the IDBs. Both N-face and Ga-polarity films were obtained. On the polycrystalline diamond substrates, FORTH achieved single orientation (0001) GaN films (Figure 22a). The GaN growth was optimized on the {110} texture polydiamond substrates and smooth GaN surfaces were obtained, with RMS roughness as low as 1 nm. Both N- and Ga-polarity films could be controllably grown. All GaN films were found to be under tensile stress. The optimized layers exhibited PL up to room temperature, with PL FWHM values as low as 12.5 meV at 24K and 40 meV at 300K. Eventually FORTH demonstrated the first successful operation of AlN/GaN HEMT devices on polydiamond substrates. Transistors with 1 ?m gate length, fabricated with photolithography, exhibited nearly 400 mA/mm current densities and good pinch-off behavior (Figure 22b). UoB and EPFL also explored the direct growth of GaN buffer layers on PC diamond using MOCVD. But this approach was not successful. Until the end of the project it was not possible to achieve a homogeneous GaN layer with sufficient structural quality for device applications. In conclusion, WP3.3 demonstrated the feasibility of developing GaN HEMT devices by heteroepitaxial MBE growth on polydiamond substrates, which are available with large wafer diameters. Details are described in deliverable reports 3.3.1 and 3.3.2
Figure 22: (a) XRD theta-2theta scan of a single orientation (0001) GaN film grown on polydiamond substrate (Left), (b) I-V characteristics of an 1?m gatelength AlN/GaN HEMT device fabricated from heteropitaxial GaN-on-polydiamond material
TASK 3.4. EPITAXIAL VALIDATION (STARTING DATE : M12)
Leader : AIX
The objective of this task was the evaluation of the mass production potential for the MOCVD of AlInN hetero-structures on all kind of "MORGAN substrates" including hybrid and diamond substrates as well as the definition of the best reactor concept for the large area growth. WP3.4 was divided into 2 sub-tasks; the process transfer from 2 inch R&D equipment into production type large area multi wafer reactors and the simulation of growth processes in production equipment.
Until the end of the project no large area (? 4 inch) diamond-Si hybrid substrates have been available and the direct MOCVD growth on polycrystalline diamond was not successful - see WP3.3. Therefore AIX focused on the growth on 150 mm Si substrates as an example for low cost substrates and ATL on the process transfer from 2 inch to multiple 3" SiC and sapphire substrates. To evaluate the influence of the reactor concept, horizontal gas flow reactor versus vertical showerhead reactor, AIX has used a horizontal 6 x 150 mm AIX2800 HT Planetary Reactor® whereas ATL used a new 7 x 3" Close Couple Showerhead (CCS) reactor, which has been installed during the last reporting period. In both types of reactor processes have been transferred successfully from R&D to production type equipment. AlInN bulk material and AlInN/GaN HEMT heterostructures with optimised physical properties have been demonstrated by ATL on 3" sapphire and SiC substrates. AlInN/AlN/GaN heterostructures with a good structural quality, sharp interfaces, a high semi-insulating GaN buffer and a good homogeneity of their electrical properties have been obtained with a good reproducibility from run to run on 3" sapphire and SiC substrates - e.g. a sheet resistivity of 216 ?/? with an uniformity of 1% was achieved on 3" SiC.
Today, the basis for MOCVD reactor design and optimization is the modeling of correlations between new reactor hardware and expected MOCVD process results. Prerequisite for the process simulation is the existence of a chemical model, describing the real growth conditions as good as possible. When MORGAN started good models for the MOCVD growth of GaN have been available but these models failed for the simulation of AlN containing materials due to complex chemical gas phase processes between the Al- and N-precursors. Based on the experimental results from WP3.1 and pre-existing know how regarding MOCVD chemistry for pure AlN, an improved growth model for the AlInN growth has been developed and was optimized in several iterations. The model has been validated by the correct prediction of the experimental results achieved in the 6 x 150 mm Planetary Reactor® for the AlInN deposition on large area Si substrates and can be used for further process optimizations regarding improved wafer uniformity on the 150 mm substrates.
WP4 HIGH PERFORMANCE MATERIALS FOR EXTREME ENVIRONMENT (IVF)
Leader : IVF Partners : ITE, GEM, SFO, VIV, FCUB, IC
WP4 HIGHLIGHTS (IVF)
- Multilayer ZrN/ZrB2 diffusion barriers that are stable and ohmic up to 800 oC for 10 hours in Ar atmosphere.
- Direct manufacturing of Cu coolers for WP8.
- Sealing with glass frit hermetic up to 1050 ?C.
- Interconnections based on Ag and Pt cycled to 650 ?C for over 500 cycles, total test time was over 750 hours.
TASK 4.1. MATERIALS FOR INTERCONNECTION (STARTING DATE : M1)
Leader : IVF Partners : GEM, IC, ITE, SFO, VIV
Our ambition in this task was to introduce new contact schemes based on MAX phases for harsh environment applications, such as high temperature (up to 1000°C), corrosive environment and high electric fields. Mn+1 AXn phases are ternary high temperature phases, where M is an early transition metal, A is an A group element (mostly IIIA and IVA) and X is either C and/or N. They consist of layers of Mn+1X interleaved with layers of pure A1. There are about 50 different phases known today, which have promising properties of combined ceramic-metallic behavior such as thermal stability and electrical conductivity.
However, as the stability at high temperatures is an essential requirement, Impact Coatings conducted a study on the phase stability of the investigated MAX phases. The study showed that, in contrast to reported high thermal stability for bulk, MAX phase coatings decompose already at temperatures barley higher than the phase formation temperature. The mechanism behind the decomposition is out diffusion and evaporation of the less tightly bound A atoms, followed by recrystallization and formation of carbides or nitrides.
Instead, focus in the task was shifted to diffusion barriers to conventional Ti/Al ohmic contacts, which would be based on multilayer stacks of refractory metal nitrides and borides, in particular ZrN, ZrB2, TaSiN and TiN developed at ITE. Refractory metals and their compounds are known for having a high thermal stability and from previous experience at ITE it was known, that the thermal stability of the films can be raised by combining different thin films into bi- or multilayer stacks due to the presence of interfilm boundaries, which, for films of different crystal lattice structures, inhibit interdiffusion effectively.
Two multilayer systems were developed: TaSiN/TiN-based one and ZrN/ZrB2- based one. The first, having a structure of 5 times (TiN/TaSiN) with a total thickness of 78 nm was shown to be stable at 800oC for 30 minutes in an argon flow. The Zr-based scheme had a structure of 13 times (13 nm ZrB2/13 nm ZrN). This scheme was stable at 800oC for 30 minutes in nitrogen flow and with subsequent annealing at 900OC for another 30 minutes, only slight interdiffusion was observed in the contact structure. When placed directly on GaN substrate, the barriers remained stable for 10 hours in argon atmosphere under 800oC, and the ohmic character of the junction was retained, at rc = 4.3 ×10-3 ?cm2 .
Figure 23. SIMS depth profiles for the structures after deposition (left) and after subsequent annealing at 800oC (middle) and at 900oC (right). Very slight Au diffusion observable after the last annealing.
TASK 4.2. MATERIAL FOR FLIP-CHIP MOUNTING (STARTING DATE : M1)
Leader : SFO Partners : GEM, IC, ITE, IVF, VIV
In this task we have investigated liquid flip chip connections. Two main problematic areas were found with the liquid contacts at high temperatures (above 400 ?C), oxide formation and incompatibility with the glass used to seal the package. See deliverable 4.2.4 for details.
TASK 4.3. MATERIAL FOR HIGH PERFORMANCE HEAT EXTRACTION PACKAGES
Leader : IVF Partners : FCUB, GEM
In this task we have worked with development of materials for layer manufacturing of cooling devices for WP8. The FCubic layer manufacturing process is developed for stainless steel and to increase the performance we have worked with adaptation of new materials such as silver and copper, which have much higher thermal conductivity, to the process. Silver is The results have shown that copper powder oxidizes easily in humidity and/or at elevated temperature in air, which causes binding of non-printed powder sections in the process conducted at 70-80 ?C in ambient atmosphere. After printing a thermal treatment at 200 ?C in air eliminates liquid parts of ink (glycol) and make printed component rigid to enable proper release. This phase causes severe oxidation and strong interparticle bonding within non-printed sections. To enable processing of copper this oxidation has to be avoided in the shaping sequence. We have used a protective coating of the Cu particles as a possible solution to this problem.
Coolers in copper were shaped, oxidized (3 or 5 h at 450 ?C) and sintered (2 or 4 h at 1050 ?C) and post-straightened in shape to correct the bending effects. Prior to assembling, the coolers were treated with acetic acid to remove surface oxide and subsequently coated for oxidation protection.
Figure 24. The dimensions change during the different process steps (left). Sintered copper coolers (right).
TASK 4.4. MATERIAL FOR HIGH TEMPERATURE ENVIRONMENT
Leader : SFO Partners : GEM, ITE, IVF, VIV
In this task we have worked with the adaption of the packaging of the two pressure sensors in WP 7. Early in the development in WP 7, potential difficulties with the cantilever pressure sensor packaging design was discovered and therefore it was a strategic decision to introduce the drumskin pressure sensor as a contingency. The work in this task has centered around materials for the packaging, sealing and interconnections of the high temperature pressure sensors, but the processes and materials used are generic and can be applied for other applications.
A planar and a cylindrical packaging concept were considered. The cylindrical form fits very well into applications where the pressure sensor should be fit into a bolt and screwed into of a reaction chamber, while the planar form has some advantages regarding manufacturing. The decision was made to use cylindrical packaging and a green state ceramic manufacturing process integrating Pt wires into the ceramic structures was developed. Leak tests in high temperature showed that a sealed pressure cell of alumina with electrical interconnections of platinum can be produced. When a glass was used to join alumina parts and to seal the electric interconnections the pressure cell was gas tight (leakage < 1x10-6 mBarl/s) from room temperature up to 1050°C.
Several materials for interconnection to a sensor chip have been tested in combination with the ceramic package. The best results in terms of electrical conductivity and temperature stability was shown using interconnects based on sintered silver nanoparticles. A test package using this combination of materials was successfully temperature cycled to 650 ?C (with the interval 30 min at 650 ?C, 30 min at 20 ?C, total time of one cycle 90 minutes). During temperature cycling the conduction through a pair of interconnects was monitored and show only minor degradation in the electrical performance after more than 500 cycles (). The total test time was more than 750 hours.
Figure 25. A diagram showing one temperature cycle and the degradation of the electrical conductivity of an early vs a late cycle (left). The package under test (right).
WP5 NANODIAMOND AND PASSIVATION (TUU)
Leader : TUU Partners : IEE, TUW, ITE, MFA, IEMN
The objective of this work package was to develop a new surface heat extraction technology for InAlN/GaN HEMTs, via the overgrowth of a highly thermally conductive nanocrystalline diamond films (NCD) on top of the HEMT device structure. The main challenge was to maintain the integrity of the device building blocks (epi-layer, ohmic and gate contacts and passivation) in the harsh environment of the NCD deposition process (between 700 °C and 800 °C for several hours in hydrogen-radical rich environment). Thus the technology developed should yield in a high thermal stability, allowing the fabrication of high frequency/high power HEMTs with an integrated top heat spreader.
All of the main objectives of this WP have been met and the work extended even further to explore alternative solutions and related applications. The main results of this WP are summarized below and can be found in detail in the contractual deliverables 5.1.3 5.2.3 and 5.3.4. They were achieved thanks to the intense cooperation and feedback between a large number of partners of various WPs, especially in terms of high resolution TEM analysis of the NCD films and coated HEMTs, SIMS profiling of passivation layers, small and large signal measurements of the HEMT devices, thermal measurement, simulations and high temperature testing. As well as achieving a fully processed, NCD-coated InAlN/GaN HEMT structure with essentially undegraded DC and small signal RF performance for the first time, the innovative highly thermally stable metallization and passivation technologies developed represent an important milestone concerning high temperature GaN HEMT electronics, were continuous large signal 1 MHz operation was demonstrated up to 1000 °C. This represents a world record of high temperature field effect transistor device operation achieved by the MORGaN consortium (for details see WP 6).
WP5 HIGHLIGHTS (TUU)
* Highly thermally stable ohmic and gate contacts and passivation schemes, a prerequisite for NCD overgrowth of a fully processed device structure, also serving as starting point for the development of a high temperature device structure operating up to 1000 °C. (TUU).
* Fully functional, gated HEMTs with 1 µm NCD overgrowth using two different nucleation techniques yielding current densities above 1 A/mm and cut-off frequencies ft up to 56 GHz. (TUU, NCKU).
* Optimization of NCD layers with isotropic thermal conductivities above 500 W/mK even for films as thin as 600 nm and vertical thermal conductivity approaching 1000 W/mK for 800 nm thick films (TUU, GLG, TUW).
* Development of essentially lag-free passivation using several passivation schemes including (a) thermally grown native oxide/ Si3N4 (TUU), (b) thermally grown native oxide/MOCVD grown Al2O3 (IEE), (c) in-situ Si3N4 (AIX, TUW and TUU) and (d) n+-GaN cap layer directly grown onto the InAlN/GaN heterostructure (TUW).
* MOSHEMT output power of 11.6 W/mm (at 2 GHz and 25 V drain bias) and cut off frequencies (ft and fmax) of 44 GHz and 105 GHz respectively achieved using novel thermally grown native oxide/ Si3N4 multi layer passivation stack (IEMN and TUU).
* High resolution TEM analysis (MFA) of heterostructure, passivation, ohmic and gate contacts, nucleation and NCD layers revealed the nature of grown films and their effects on HEMT structures essentially enabling the development of many critical steps of this new overgrowth and high temperature stable device technology.
* Thermal measurements (GLG) and simulations (TUW, GLG and TUU) for NCD films grown at different temperatures enabling to tailor growth parameters for optimal heat spreading effect.
TASK 5.1. DEVICE PASSIVATION (STARTING DATE : M1)
Leader : IEE Partners : TUU, TUW
The traditional insulation/passivation layer used in NCD growth is SiO2. However; using a SiO2 device passivation as seeding material for NCD overgrowth for heat sinking seems not feasible due to its low thermal conductivity. Thus, although this passivation was not suitable for the InAlN/GaN HEMT device structures developed here, it was used for initial overgrowth experiments to test the stability of the heterostructure and metal contacts. However, subsequently several other passivation schemes were developed and tested for temperature stability under NCD growth conditions (the indicator chosen was stability at 700 °C).
This was firstly the thermal oxidation of InAlN and subsequent passivation with PECVD Si3N4. The crystallinity and the thickness of the native oxide layers were analyzed using high resolution TEM. The optimized oxidation process (4 min. oxidation at 800 °C, 1.5 nm oxide thickness) was applied to HEMTs with 0.25 µm gate length yielding a current density of 2.4 A/mm, output power density of 11.6 W/mm at 2 GHz and 25 V drain bias. The result shows that the full channel charge density could be large signal modulated due to the elimination of current collapse effects. Cut off frequencies (ft and fmax) of 44 GHz and 105 GHz respectively were also achieved. This passivation scheme was applied for most of the NCD overgrown devices.
Secondly, this was a Si3N4 N+-doped GaN cap layers directly grown onto the heterostructure where the gate was recessed down to InAlN using highly selective, damage-free ICP RIE process. Due to surface charge screening. This configuration provides essentially gate-lag free device operation. A (1 hour) 700 °C test indicated no change (and thus the possibility to be used in overgrowth experiments).
A third configuration was MOCVD-Al2O3 on native oxide MOS_HEMT structures. Pulsed characteristics showed no essential current lagging at a drain current of 0.6 A/mm. Additionally gate leakage was reduced to less than 10-8 A/mm in combination with an of-state breakdown more than 100 V. Large gate length test HEMT structures were used in a comparative study with Schottky barrier HEMTs, HEMTs with thermal oxide passivation and MOS-HEMTs with a thermal oxide/MOCVD-Al2O3 multilayer passivation, with and without forming gas (FGA) treatment at 700 °C before the Ni/Au gate deposition. Devices sustained thermal stressing at 700 °C in FGA for more than 4 hours.
A fourth configuration was in-situ Si3N4 passivation of heterostructures during MOCVD growth. A chlorine-based etching process was developed to recess the passivation for ohmic and gate contact deposition without inducing damage to the heterostructure. Short gate devices (0.5 µm and 0.25 µm) were fabricated and yielded current densities of 1.2 A/mm and showed no gate lag effects in pulsed measurements.
TASK 5.2. NANOCRYSTALLINE DIAMOND DEPOSITION (STARTING DATE : M1)
Leader : TUU Partner : IEE
In this task nanocrystalline diamond films have been deposited using Hot Filament Deposition (HFCVD) onto InAlN/GaN heterostructures and devices on SiC substrate. Layers up to 6 µm have been deposited without structural damage and without any essential degradation of the interfacial 2DEG channel sheet charge density. To nucleate diamond growth Bias Enhanced Nucleation (BEN) and nanodiamond seeding are widely used; both have been used to outgrow NCD films and both have resulted in fully functional devices.
The main technology developed was based on Bias Enhanced Nucleation and Hot Filament CVD using thin amorphous Si interlayers on Si3N4, largely consumed during the nucleation process itself. Thus, no conductive surface pass is formed. The motivation to concentrate on this nucleation technology was twofold. Bias enhanced nucleation results in a covalently bonded interface to the substrate and thus a low thermal interface resistance. Secondly, this nucleation technology had already been refined for more than a decade for other applications before applying it to InAlN heterostructures.
A limited number of experiments have been performed using nanodiamond seeding provided by the research group of Prof. Tommy Tzeng at the national Cheng Kung University (NCKU, Tainan, Taiwan) in the frame of collaboration between NCKU and TUU funded by the Taiwanese Research Council. The nucleation process was followed by short growth (to obtain a closed film) performed by Microwave Plasma CVD. The growth is then continued in TUU by HFCVD. Outgrowth had been performed by HFCVD on 2" diameter (SiC) substrates or wafer pieces. Outgrowth parameters (temperature, pressure, nucleation density) were optimized for low graphitic content, controlled grain size development with film thickness, vertical columnar structure and low thermal stress.
The graphitic grain boundary network of NCD films may dominate the thermal properties. To limit this effect usually a high growth temperature above approx. 700 °C is needed. This temperature (and the H-rich growth atmosphere) may however degrade a GaN or AlGaN surface. In contrast the InAlN surface has been found to be essentially stable under such seeding, nucleation and outgrowth conditions. Thus this work had concentrated on InAlN/GaN HEMT structures. Optimization lead to the following conditions mostly used here: nucleation temperature: 750 °C for BEN and 550 °C for nanoparticle seeding, growth temperature: 700 °C to 750 °C, growth rate: 0.1 to 0.3 µm/hour. InAlN barrier layer thickness had been between 5 to 10 nm. NCD growth experiments up to 6 µm thickness were initially conducted on bare InAlN/GaN and device structures realized after NCD growth by selective NCD etching, confirming the heterostructure stability under growth conditions. SiC substrates did not show any restriction in growth thickness and uniformity (for 2" wafers). Only few experiments could be conducted on sapphire substrates showing a thickness limit of approx. 1 µm due to severe thermal mismatch.
Due to the high growth temperature, the H-rich growth environment and the long growth times of several hours a new contact technology had to be developed for ohmic as well as gate contacts. Au would become soft during NCD deposition and the passivation would crack. Thus, a Au-free ohmic contacts (Ti/Al/Ni/Cu/Ta) were developed and NCD films up to 5 µm thickness were grown on gateless HEMTs (With Si3N4 passivation) showing current densities of 2 A/mm after NCD deposition. Cu/Ta and Mo were used as gate metallization instead of conventional Au/Ni gates. These contact technologies then also served as basis for the development of high temperature stable devices as described in WP6. As passivation, thermally grown oxide/PCVD Si3N4 was used (see above). This seemed similar to the Si3N4 passivation commonly used in GaN based HEMT technologies. However, only Si3N4 films with low H-content would withstand the harsh growth conditions. Thus only few of the technologies developed and discussed in WP 5.1 could actually be successfully employed in the NCD overgrowth step. Fully functional gated HEMTs with 1 µm NCD overgrowth using the two different nucleation techniques discussed above yielded current densities above 1 A/mm and cut-off frequency ft up to 16.8 GHz (BEN) and up to 56 GHz (seeding). Successful overgrowth of fully processed HEMTs with films as thick as 3 µm was demonstrated with current density above 1 A/mm but still suffering from an increase in leakage current mainly due to a thermal budget of 30 hours at 750 °C. The HEMT overgrowth experiments were supplemented by growth experiments for TEM and thermal analysis performed in WP 5.3. This WP also provided uniform NCD growth on 4" Silicon on insulator wafers for WP 1, processing of AlGaN/GaN HEMTs on single crystalline diamond substrates for WP 3 and processing of InAlN/GaN HEMTs on Si/polydiamond substrates for WP 1, 2 and 3.
TASK 5.3. MATERIAL CHARACTERIZATION (STARTING DATE : M1)
Leader : IEE Partners: IEMN, ITE, MFA, TUU, TUW
Material characterization of the top diamond heat spreader focused on structural analysis by TEM (MFA) and thermal analysis by SThM (GLG). This accompanying work was performed continuously on several levels and served as basis for monitoring, modifying and optimizing the technology steps used in HEMT fabrication and overgrowth. Additionally, electrical characterization (DC, pulse, small signal, large signal) and SIMS profiling were applied and details are reported in the corresponding work packages.
Extensive high resolution TEM studies were performed on all critical elements in the materials stack: (a) the native oxide film formed by thermal oxidation, (b) the diamond nucleation interface including the role of the Si-interlayer and (c) the outgrown film and developing grain structures. The TEM images (together with elemental maps) performed on thermally oxidized InAlN/GaN HEMTs showed a homogeneous thermal oxide for short oxidation times (< 5 min) and an initial oxidation rate of 0.37 nm/min. The oxidation front starts to become clustered for longer oxidation times and leads to degradation of the electrical device characteristics. Thus this TEM study was essential to obtain the MOS-HEMT results reported in WP 5.1. High resolution TEM images also revealed the first stage of the BEN nucleation mechanism. SiC crystallites are formed on the top of the Si-interlayer, which serve as the nuclei for further diamond growth, providing indeed covalent bonding between the substrate and the NCD film. Similar analysis was performed on NCD films nucleated with nanoparticle seeding. TEM images of 0.25 µm NCD films nucleated by BEN and grown at different temperatures (700 °C to 800 °C) showed homogenous NCD coating of the heterostructure with V-shaped columnar growth profile in all cases, with an average grain size of around 100 nm. This analysis was then used to lower the growth temperature from 800 °C to 700 °C without change in growth morphology.
Additionally TEM images were performed on fully fabricated and NCD coated devices to observe the effect of the NCD growth on the physical device structure. Examination of the heterostructure, metal contacts and passivation did not show any visible degradation or metal diffusion into the InAlN confirming the high thermal stability of the heterostructure.
Thermal conductivity measurements were performed using a scanning thermal microscopy (SThM) method: a temperature sensing nanotip maps the temperature distribution in NCD films as they are heated up by a resistive heater fabricated on the sample. The data obtained for NCD films with different thicknesses were analyzed using thermal simulation models taking into account the thermal boundaries of the passivation and interlayers and the thermal conductivity of the substrate. For films of 600 nm thickness a thermal conductivity of about 500 W/mK was extracted, which is approximately ¼ of the ideal value for single crystal material. Due to the outgrowth of the grain structure, the conductivity profile should be thickness dependent. This was analyzed by NCD films etched in steps. In this way thermal mapping indicated a vertical thermal conductivity approaching 1000 W/mK for an 800 nm step, which is already half of the ideal value.
Additionally, when gateless HEMTs overgrown with NCD films were used as bottom heaters, thermal mapping indicated a cooling effect on the actual HEMT structure with a reduction in the thermal resistance by approximately 20% (measured using 300 nm thick NCD coating). Up to now no heat sink had been integrated on top NCD coating. However, a heat sink had been added by simulation, showing the effect of cooling independent of the substrate type (sapphire or SiC) or GaN buffer layer thickness. Detailed simulation results are reported in D 5.2.3.
WP6 PHYSICAL PROPERTIES AND MODELLING (TUW)
Leader : TUW Partners : ATL, CTU, GEM, IEMN, IVF, MG, SFO, STU, TUU, TUW, UFJ, VIV
WP6 HIGHLIGHTS
This work package (WP) covers several mostly characterization and simulation tasks providing input for demonstration WP 7 and WP 8. Physical models for transport in RF HEMTs, including self-heating and trapping effects (Task 6.2) and GaN HEMT- based sensors (Task 6.1) have been developed. The former have been used to develop non-linear transistor models at higher hierarchical level for RF power bars (Task 6.4). Methods have been developed to evaluate heat conductivity of nano-crystalline diamond over-layers (Task6.5). Channel temperature has been simulated for different kind of substrates and overlayer coatings (Tasks 6.4 6.5). Factors determining stability and degradation mechanisms of RF transistors (Task6.6) and sensors (Task6.3) have been identified.
TASK 6.1. THERMAL, MECHANICAL, AND PIEZO EFFECT SIMULATION (STARTING DATE : M1)
Leader : UJF Partners : CTU, MG
Detailed modeling of GaN-based particular pressure and strain sensors has been performed. Although the modeling was focused towards different GaN-based heterostructures as AlGaN/GaN, AlN/GaN, or InAlN/GaN, other materials potentially present in the final physical sensor device were also taken into account. The coupled-field analysis necessary for sensor modeling is complex due to the fact that the sensing mechanism is based on integrated HEMT element. Therefore, the electrical, mechanical, and thermal behaviors of different structures were studied separately. The electro-mechanical modeling was focused on AlGaN/GaN HEMT-based stress gauges employed in a cantilever-based strain sensor and in a diaphragm-based pressure sensor. To model the different physical phenomena participating in the sensor function, a full analytical model has been developed, confirming the feasibility of the sensing principle considered in the project. Simulation results based on real parameters document linear sensitivity characteristics for both sensor configurations. The theoretical sensitivity of the strain sensor is 14.4 A/N for a 520 µm long and 100 µm wide cantilever. The theoretical response of the pressure sensor is 0.97 mA/MPa for a range from 1 MPa to 10 MPa. For a load concentrated at the center of the diaphragm, the model provides a sensitivity of 0.77 mA/N in a range from 5 N to 50 N. The pressure and force ranges ensure a maximal displacement of 2 µm at the center of the diaphragm.
The coupled numerical thermo-mechanical finite-element modeling of composite cantilever and diaphragm structures has provided deflection, strain and stress behaviors of sensor structures in a large temperature scale. The thermo-mechanical model of the final device comprising sensing element and a package was also developed providing information about the sensor high temperature behavior in a steady-state and transient regime. Approaches to the modeling of AlGaN/GaN HEMTs in Silvaco TCAD environment allowing incorporating polarization effects (spontaneous + piezoelectric) were studied and an estimation of the pyroelectric effect on the sensor response was also obtained.
TASK 6.2. ELECTRICAL TRANSPORT (STARTING DATE : M1)
Leader : IEMN Partner : ATL
A new physical-thermal model, based on energy-balance transport model coupled with a heat diffusion equation, has been developed by IEMN to simulate the thermal effects in RF transistors. Influence of the lattice temperature on the transport properties everywhere in the active area is taken into account which accurately describes the electrical and thermal performances. The model is implemented by means of COMSOL® software, which uses a finite-element method. TLM devices and HEMT structures biased close to the operational conditions were simulated for different substrates using 2-D meshing not taking into account thermal coupling existing in large power transistors. At VDS=14V and VGS=0.0V the lattice temperature distribution in the active area is very different for the different substrates with a maximum temperature of 740K for the Si substrate, 560K for the SiC and only 420K for the diamond substrate. The electron energy peaks at the gate exit and its maximum value increases with the improvement of the thermal dissipation due to better transport properties. For an equivalent to 1mm width device, the thermal resistance, RTH rises versus the dissipated power from 2.5 to 5.2Kmm/W for a dissipated power P of P=35W/mm for diamond substrate, from 5.5 to 17.5Kmm/W for P= 23W/mm for SiC substrate and from 11.4 to 33Kmm/W for P = 10W/mm for a Si substrate.
Furthermore gate lag effect in In0.18AlN0.82/GaN HEMTs has been simulated using ATLAS/Blaze (Silvaco) by 35L. Drift-diffusion model under isothermal conditions is used. Both donor (Ndt) and acceptor (Nat) traps located in the buffer are taken into account. The analysis of current evolution as a function of the temperature and donor trap density shows that the traps in the buffer induce the current decrease with time. This decrease depends on the trap density Nat and saturates for Nat>1017cm-3. A maximum of the current occurs at 100µs. It is temperature dependent and vanishes for Nat=Ndt. The origin of this maximum is due to a hole capture phenomenon arising in the source-gate region, which lowers the access resistance and increases the drain current. Beyond this maximum, a hole emission takes place in both source-gate and gate drain area causing a decrease of the current due to the increase of the negative trapped charge in the buffer.
TASK 6.3. ELECTROCHEMICAL EFFECTS (STARTING DATE : M1)
Leader : TUU Partners : GEM, IVF
Electrochemical pH sensors, based on ion-sensitive field effect transistors (ISFETs) composed of pH-sensitive nanocrystalline diamond electrodes and AlInN/GaN HEMTs have been fabricated and analyzed. Their advantage compared to commercially available ISFETs based on silicon MOSFET technology is the extreme chemical stability of diamond in harsh environments, since the metal oxide films (e.g. TiO2 or Ta2O5) used the Si-based ISFETs degrade especially in highly alkaline electrolytes at elevated temperatures. Possible applications of our device can be found mainly in food industry, e.g. brewing industry. The pH sensitive element of the device is the oxygen-terminated diamond electrode, where the oxygen termination is obtained by wet-chemical treatment or by anodic polarization in alkaline electrolyte. High and stable pH sensitivity of 45-50 mV/pH has been determined from open-circuit potential measurements between the diamond and a pH-insensitive reference electrode. In addition, the nanocrystalline diamond electrodes showed no degradation even after exposure to hot (T = 75 °C) KOH-based solutions. One important characteristic of the ISFET is the pinch-off voltage, which should correspond to electrode potentials within the potential window of water dissociation of the diamond electrode. One of the two main parameters determining the pinch-off voltage of the fabricated ISFET sensors is the AlInN barrier layer thickness. It was adjusted to 6-7 nm, resulting in a pinch-off voltage of approx. -2 V. The second parameter which significantly shifts the pinch-off voltage of the full pH sensor (not the HEMT itself) is the gate leakage current determined by leakage across the surface passivation layer of the HEMT. Therefore, the choice of a suitable passivation layer is essential for the fabrication of highly sensitive and stable ISFETs. The fabricated ISFETs showed high pH sensitivity between pH ? 1 and pH ? 13 with low noise (see also task 7.2).
TASK 6.4. DEVICE MODELLING FOR HIGH POWER (STARTING DATE : M1)
Leader : ATL Partners : IEMN, STU, TUW
The first task was dedicated to Non-Linear Modeling. DC, small and large signal characterizations in CW mode were conducted on elementary devices of 2.4mm total gate width at IEMN/MC² on the three generations of devices realized during the project. The best performances were obtained on the third devices generation with an output power of 4.2W/mm with 55% of PAE and 20dB of linear gain at 2 GHz. Non-linear models were extracted on both device generations. Neuronal based models (IEMN/MC2) and phenomenological based models were developed and compared to solve convergence issues that occur on the whole power die composed by 15 transistors in parallel. Phenomenological based models allow us to obtain better convergence on the power die which was a key issue for the amplifier design in WP8.3. Models were validated on the elementary device and power die at ATL.
The second task was devoted to the prediction of channel temperatures by simulation for different substrates (polycrystalline diamond-based, composite Si/poly-diamond), different mounting schemes (flip-chip versus standard mounting) and, with and without polycrystalline diamond top-heat spreaders. These simulations were conducted in relation with WP8.2 related to package simulations. A maximal per-unit-length dissipated power of 6 W/mm for a channel temperature of 200°C is predicted with the most advanced solution with a 36mm total gate width power die (Diamond substrate with Kth=2200W/°Cm - thickness=100µm, with a backside chip heat spreader: Synthetic CVD diamond TM180 Kth=1800W/°Cm - thickness=500µm and a polycrystalline diamond top-heat spreader, a CM4 based power device package and copper carrier). Furthermore no improvement in thermal resistance has been found in GaN HEMTs grown on Si/poly-diamond/Si composite substrate in comparison to pure Si substrate.
Finally the mechanical stress of power amplifier has been evaluated as a function of temperature. Materials used in stacking have been evaluated from the point of view of their thermal expansion coefficients. The optimal final stacking was analyzed and compared to more conventional approach showing the relevance of the stacking used for the final demonstrator from a thermo-mechanical point of view.
TASK 6.5. THERMAL CHARACTERIZATION (STARTING DATE : M1)
Leader : GLG, Partners : ATL, IEMN, SFO, TUW
Highlights of this task include the development of a novel Scanning Thermal Microscope (SThM) probe for temperature measurement at the high temperatures typical for advanced GaN based devices, the use of microfabricated heaters on structured films to measure the thermal conductivity of thin films and interfaces and the development of advanced 3-dimensional models of thermal transport in these model systems to allow the independent extraction of numerical values for the relevant thermal properties. These measurement methods were particularly useful in enabling the measurement of the thermal conductivity of nanocrystalline diamond "heat spreader" layers. A particularly useful result of this work was the development of a set of analytical expressions for the variation of temperature with position allowing the extraction of the required values without the need to generate new models for each experiment, greatly aiding the practical application of the technique. The results of these measurements were fed back into the device modeling and device design program to allow rational optimization of the devices without the need to fabricate large numbers of test devices. The accuracy of the results obtained from the measurements was established by means of an extensive program of inter-comparison and calibration. The SThM method accuracy was confirmed by measurements of thermal conductivity on a monocrystalline diamond substrate of known thermal conductivity. This subsequently allowed the technique to be used to measure the thermal conductivity of the thin polycrystalline diamond substrates developed for MORGaN which were too thin to be measured by the conventional thermal flash technique. DC measurements of temperature rise in gateless transistors using SThM confirmed the quantitative utility of the heat spreader layers in reducing the average temperature rise of the operating devices investigated by approximately 24%. Both of these sets of results were compared with the results of modeling using the individual extracted values for thermal properties of materials, closing the loop from materials property measurement to device performance prediction.
The time-dependent thermal response of transistor - like devices was established using Transient Interferometric Mapping (TIM) and modeling and confirmed the beneficial role played by the incorporation of nanocrystalline diamond heat spreader layers under pulsed operation. In the case of a crystalline diamond substrate it was found that the channel temperature in pulsed operation saturates already after 1µs and that the thermal resistance was half of the values of devices on SiC, which was confirmed by use of micro-Raman temperature mapping.
TASK 6.6. STABILITY AND DEGRADATION MECHANISMS (STARTING DATE : M8)
Leader : ATL Partners : IEMN, STU, TUU, TUW, VIV
This task is related to a quick evaluation of reliability issues of RF transistors and sensors developed within the project.
Long term and temperature stability of gate contact and of surface preparations of InAlN transistors fabricated by ATL has been investigated. Tests of InAlN transistors with Schottky gate contact lead to the conclusion that the combination of Ni Schottky contact and ATL material and process was suitable for operations at junction temperatures lower than 100°C and bias voltage below 30V. The development of a MOS gate brought a huge improvement regarding higher temperature withstanding and breakdown voltages despite still a bit higher gate leakage currents than in AlGaN transistors. DC on-state tests have demonstrated promising stability at junction temperatures which are more than 200°C higher than in Ni Schottky contact devices. Reverse bias tests at 175°C were performed at drain voltages of 120V. A physical analysis of transport mechanisms over Ni gate/InAlN Schottky barrier using a four component model shows that tunneling current dominates compared to thermionic emission. Various parasitic leakage paths and advantage of oxidized gate contact in transport have also been analyzed. A study of stability of Ir/InAlN Schottky contacts at annealing temperatures as high as 700°C revealed a role of oxygen diffusion in Ir, but excluded Ir penetration into the InAlN barrier. Gate and drain-lag experiments combined with C-V measurement have been used to study traps in devices manufactured by MicroGaN on III-V lab material. The studied samples showed rather high traps densities and poor electrical stability. A good stability of output power, PAE and power gain during the microwave on-wafer measurements (VDS up to 40V at 2GHz) has been demonstrated on HEMTs with MOS gate from ATL, showing however an increased gate leakage current due to gate contact degradation.
A setup and method of transistor evaluation under DC and 1MHz operation beyond 1000°C has been developed. InAlN/GaN transistors operating at ambient temperatures of 1000°C were demonstrated and the information on suitable contact metals for high temperature operation was provided to WP8.
A double gate structure was developed for evaluation of charge-injection in passivation layers during long term off-state stress tests. This technique appeared more sensitive than monitoring of the other electrical parameters. Futhermore device parameters like Idmax, reverse leakage current,... degrade with reverse voltage stress more gradually in InAlN HEMTs as compared to AlGaN/GaN transistors. Effects of negative charge trapping (defect generation) causing gate current decrease (increase) have been identified.
Double heterostructure HEMT investigations have shown lower resistance degradation due to better carrier confinement with respect to single well HEMT.
Finally first long term temperature cycling experiment of packaged drum skin sensor shows promises for its high temperature operation. High
WP7 PROCESS AND MATERIAL VALIDATION FOR EXTREME CONDITION SENSORS (MG)
WP7 HIGHLIGHTS (MG)
WP7 is one of two demonstrator work packages of this project. The results of different work packages are put together in order to demonstrate mechanical and electrochemical sensors: crystal growth (WP2), packaging (WP4), diamond growth (WP6).
For the first time the proof of concept of two different AlGaN/GaN based pressure sensor approaches has been shown: Packaged drumskin and cantilever sensors have been measured up to 80 bar. The pressure ranges can easily be increased by increasing the sapphire substrate thickness in case of the drumskin or by increasing the stainless steel membrane thickness in case of the cantilever. Additionally, measurements at elevated temperatures have been performed: electrical measurements of packaged drumskin sensors at 350°C and sensing measurements of unpackaged cantilevers at 300°C.
The feasibility of two additional sensor concepts has been demonstrated: The deflection of ELOG (epitaxial lateral overgrowth) cantilevers has been monitored and the deflection of AlGaN/GaN membranes has been compared to simulations.
In the case of the electrochemical sensor with hybrid integrated diamond electrodes and AlInN/GaN FETs a high sensitivity in the range of 20 mA/mm per pH with a high resolution of approx. 0.05 pH can be reported.
TASK 7.1. HIGH TEMPERATURE CANTILEVER DEVICE FABRICATION AND TESTING (STARTING DATE : M4)
Leader : MG Partners : IEE, UJF, STU, UoB
The main part of WP7.1 was the process development of different approaches for AlGaN/GaN based high temperature pressure sensors. Additionally detailed modeling of the drumskin sensor and the packaging have been performed within this WP.
UoB has successfully demonstrated ELOG cantilevers with deflections of 6µm for ~5µm wide and 500µm long beams and 9µm for ~15µm wide and 500µm long double clamped beams. The lateral overgrowth is based on a lithographic process where a thin sacrificial SiN layer is structured and removed by buffered oxide etch after overgrowth in order to release the beams. This lithographic process makes it possible to use a double dogleg growth window which enables ELOG growth along optimum crystallographic directions (60°). The deflection was monitored by observing interference fringe shift while the cantilevers are deflected by a piezo-controlled nano-positioner.
For the design of the drumskin sensor simulations have been used by UJF and UoB to place six sensing elements at appropriate positions. UoB and UJF have developed mechanical models, which can be used to adjust the sapphire substrate thickness for targeted pressure ranges. IEE has developed a high temperature compatible fabrication process for this sensor. This process utilizes conductive metal oxides on the gate interface directly by thermal oxidation of evaporated and patterned thin Ni and Ir gate interfacial layers. This novel gate metallization increases the conductance and the devices do still exhibit the improved transport parameters in comparison to the conventional device after annealing at 800°C.
UJF has built a test rig for the drumskin sensor where a force is applied to the middle of the sensor. Based on these measurements a detailed model has been developed which shows a maximum sensitivity value for the central HEMT of 235 µA/µm.
MG has developed a fabrication process for AlGaN/GaN cantilevers on silicon substrates. In this process cantilevers are defined before the silicon substrate is selectively removed below them from the backside by silicon dry etching. The chip design includes a temperature sensor and two cantilevers in a Wheatstone bridge configuration where one cantilever is deflected and the other one serves as a reference in order to compensate temperature effects. The sensor signal has been monitored for different deflections in a temperature range from room temperature up to 300°C.
IEE has developed a sensor consisting of a circular HEMT on top of a 1.9µm thick AlGaN/GaN membrane. The process is similar to the cantilever process. The HEMT structures are processed and the silicon is removed from the backside. STU has characterized the mechanical properties of the membrane by µRaman scattering technique. The measurements determine the tensile residual stress of the membrane to 280 - 300 MPa. A non-linear behavior of maximal deflection with the applied pressure is predicted by ANSYS simulations. The maximal deflection of 40 nm calculated for the applied pressure of 10 kPa corresponds with that obtained from optical measurements.
TASK 7.2. ELECTROCHEMICAL SENSOR FABRICATION AND TESTING (STARTING DATE : M4)
Leader : TUU Partners : GEM, IVF
The combination of diamond electrodes with AlInN/GaN HEMTs for ion-sensitive FETs (ISFETs) can be done by monolithic integration on one chip or by hybrid integration. In the latter case, the diamond electrode, which in both cases is exposed to the electrolyte, is connected to an external AlInN/GaN HEMT.
Several problems of monolithic devices were identified during the fabrication of different ISFET chips, and not all of these problems could be completely solved yet. The main aspect is the stability of the interlayer like silicon nitride (which acts at the same time as the surface passivation layer of the HEMTs) during bias-enhanced nucleation: After nucleation, the gate leakage current of the HEMTs typically increases from nA to the µA-range due to leakage through the passivation (inter-)layer. Similar effects have also been observed in WP5, where nanocrystalline diamond is used as a heat sink for AlInN/GaN microwave power HEMTs. However, in the case of ISFETs, a high leakage also results in a significant shift of the threshold voltage in contact with the electrolyte. Due to the fabrication problems, a fully working monolithic ISFET device could not yet be demonstrated.
For instant tests of the FETs in combination with the NCD electrodes, and further applications as a portable device, an electrical housing was designed for implementing the FET chip. The FET chips were mounted in the center of a PCB board with Cu/Au-based conductive pathways. By using ultrasonic wedge bonding, the FET chip was contacted to 48 pads on PCB board, thus allowing a fast connection of the NCD electrode to transistors of different geometry parameters. The use of synthesis glass as a cover allowed simultaneous optical microscopic observation during operating the device.
If the NCD electrode is in contact with 0.1 M H2SO4 electrolyte almost full modulation is achieved with a threshold voltage of approx. -3.0 V vs. SCE (neglecting the onset of a leakage current at high VDS). The pH sensitivity of the device could be verified by cycling in three different electrolytes: 0.1 M H2SO4 (pH ? 1), 0.1 M KCl (pH ? 5.5) and 0.1 M KOH (pH ? 13). The measurements do show a reproducible pH sensitivity of approx. 55 mV/pH. Measurements at constant drain and gate voltage (versus reference electrode), where the pH of the electrolyte is changed by titrating, have been performed. The response of the sensor is almost real time, taking into account that it needs a few seconds for complete intermixing of the electrolyte. Taking the steady-state values for the current, the sensitivity of the sensor is in the range of 20 mA/mm per pH.
An important parameter describing the performance of the sensor is the resolution. Information about this issue is given by time dependent measurements which do show two main effects: First, a peak-to peak noise of approx. 0.5 mA/mm could be detected. This value gives a very good resolution of approx. 0.05 pH. This value may not be limited by the sensor itself, but by parasitic effects like measurement setup, reference electrode system, or packaging of the diamond electrode (the diamond electrode was here still encapsulated using the PTFE-tape based packaging). The second effect, which again can be assigned to parasitic effects instead of the sensor itself, is the small current drift of 1E-6 A/(mm*s) with time even at nominally constant pH.
TASK 7.3. INTEGRATION AND PACKAGING (STARTING DATE : M1)
Leader : MG Partners : GEM, IVF, SFO, VIV
IVF has produced ceramic carriers for the cantilever and drumskin chips which are placed in stainless steel housings fabricated by a precision ink-jet technology developed by Fcubic for additive manufacturing and 3D printing of metal components. The mechanical design of the housings has been supplied by G&H. The carriers have platinum through wires sintered into the ceramic, which are connected to the pads on the chips by a nano-silver paste provided by GEM. In order to increase the mechanical stability additional glue was used on some samples together with the nano-Ag paste. Temperature cycling between room temperature and 625°C has shown that the glue degrades fast during the thermal stress. Samples only with soldered nano-Ag joints did survive a much higher number of cycles.
In case of the drumskin sensor IVFs glass frit technology is used for sealing the pressure cell. UJF and UoB have made mechanical simulations of this material system. It has been shown that the glass frit is suitable as sealant. UoB has built a test rig for pressure measurements which has been used at IVF in a furnace for measurements at elevated temperatures. The sensors do show very nice electrical characteristics at 350°C after annealing the silver joints at 400°C for 2 hours in nitrogen. Pressure measurements at room temperature of these sensors have been performed up to 80 bar. It has been shown that the highest sensitivity of ?IDS=40% can be reached if the sensing elements (HEMTs) are used in pinch-off (Vgs=-3.5V). Additionally it has been shown that the sensitivity depends exponentially on the pressure.
MG has measured packaged cantilever sensors up to 80 bar at room temperature. The measurements have shown that the accuracy of mounting the ceramic carrier into the housing is a very critical issue of this technology. A small displacement of the actuator needle with respect to the cantilever can destroy the latter. The precision of the 3D layer technique has to be improved in order to avoid this. It has additionally be shown that the stainless steel type has to be changed to a stiffer species for pressures above 80 bar or the thickness of the membrane has to be increased, because an applied pressure of 100bar resulted in a plastic deformation of the membrane.
WP8 PROCESS AND MATERIAL VALIDATION FOR EXTREME POWER CONDITIONS (ATL)
Leader : ATL Partners : IEMN, IVF, MG, SFO, TUW
WP8 HIGHLIGHTS (ATL)
Two mask sets (fast process and power devices) have been designed, fabricated and widely used during the project. Fast process has given a lot of feedback to epi teams and also the first results of GaN HEMT on diamond substrates. Power devices specifications have been defined. Exploration and optimization of device processing (MOS gate, passivation...) and design (Field plate) have led to improvement of device stability, breakdown voltage and fabrication yield.
State of the art device performance with a small signal gain over 20dB, high power density (6.6W/mm) and efficiency (PAE= 70%) @ 2GHz have been obtained. With those devices and with the successful development of a very efficient packaging for thermal management and good impedance matching using high-k materials (WP8.2) a very high power level amplifier has been demonstrated.
This state of the art final results of WP8 is the achievement of many different contributions in the MORGAN project not only from WP8 but also WP3 (epi material) and WP6 (physics).
Other technological development like advanced substrates (WP2), MAX phase materials for high temperature contacts (WP4) and diamond heat spreader related process (WP5) were not integrated into the power HEMT process, as expected, due to the difficulties encountered, but those technologies have gained in maturity and they leave room for improvements in the future.
TASK 8.1. TEST DEVICE FABRICATION (STARTING DATE : M1)
Leader : MG Partner : ATL
By a close cooperation between MicroGaN and ATL the lithography masks, process and relevant test plan has been set up. A four levels process has been running at MicroGaN with the possibility to use 2 additional steps for multi-finger test devices. MicroGaN has processed a total of 27 epi-wafers from all epi sources within WP3 (ATL, Aixtron, EPFL) and 2 wafer from Group4Labs. The principle process flow includes a mesa etch by Ar-sputtering, ohmic contacts (Ti 20nm / Al 120nm / Ni 40nm / Au 10nm annealed 40s @ 900°C), optical gate (Ni 50nm / Au 300nm), passivation (200 nm SiN without NH3) and airbridge (plating: 4µm Au).
A detailed list of electrical parameters has been generated and electrical characterization was performed by manual and automated measurements. Wafer maps have been created from automated measurements after gate deposition and after plating. Parameters like IDOFF, IDSSO, gate-source leakage, etc. has been investigated. The growth groups do get valuable information about homogeneity from wafer maps.
On a series of wafer from AIX the influence of NH3 flux during AlN growth on buffer breakdown voltage has been investigated. AlN starting layers are a key factor for insulating GaN buffers by reducing lattice mismatch and defect density and improving electron mobility. AIX has grown 4 AlInN/GaN heterostructures on SiC with different TMAl/NH3 ratios (240, 1200, 4700, 8200) during AlN growth. Even though the growth mode changes from 2D to 3D with higher NH3 flux, no significant differences of the GaN surfaces morphology between the samples could be observed. In contrast does the buffer breakdown voltage show an increase for low TMAl/NH3 ratios. The cause for this increase is still under investigation. The NH3 flux could have an influence on AlN quality, thickness (deposition rate increases with increasing NH3 flux) and on the AlN/GaN interface.
By comparing unpassivated and passivated devices on a wafer from III-V some general trends in the electrical characteristics can be seen. In general an increase of leakage currents, i.e. IDOFF and gate-source leakage can be observed. This could be caused by surface or interface currents. The current handling capability of the channel (IDSS0) tends to decrease after passivation. This could be caused by charges in the passivation, which can lead to a depletion of the channel region.
EPFL has grown InAlN/GaN heterostructures on three different substrates, namely silicon, sapphire and silicon carbide. The sheet resistance values compare well between the different substrates. The electron sheet density ns can largely vary, between 0.5 and 3.5 x1013 cm-2, depending on the AlInN thickness and composition. Systematically, electron mobility decreases with ns. Consequently, the sheet resistivity remains in a rather narrow range, 300 to 200 ?/sq., for a wide range of AlInN barrier designs. These results could be verified in a second experiment, where the MORGaN device layout has been processed. Parameters, like gate-source leakage current, which do depend strongly on the AlInN layer do not vary notably between the different substrates. The buffer breakdown voltage however does show a strong dependency on the substrate.
An alternative approach to direct growth of GaN on diamond is the layer transfer technique developed by Group4Labs. The MORGaN consortium has purchased wafers from Group4Labs in order to compare these two technologies. The Group4Labs wafers consist of a 100µm thick polycrystalline diamond layer grown on a silicon substrate. A standard Nitronex RF GaN layer with a diameter of 1 inch is bonded onto the polycrystalline diamond layer (2 inch carrier wafer). The GaN layer has quite a few holes in the range of hundreds of micrometers and many in the range of tens of micrometers. The surface of the wafers is very rough due to many small pins and needles of the diamond layer. Due to the extremely low yield a mapping of the wafers was not performed. After optical inspection some control samples have been measured. The working devices do behave like standard GaN-on-silicon from Nitronex with respect to DC characterization.
The electrical results from processed group4Labs wafers have shown that the direct growth of GaN on diamond developed within MORGaN project is a competitive method for the fabrication of power devices on substrates with very high thermal conductivity. The comparison of electrical results mentioned above are not superior to electrical results of devices processed on direct growth layers presented in WP5.
TASK 8.2. RF POWER PACKAGING (STARTING DATE : M7)
Leader : ATL Partners : IVF
WP8.2 was divided in three tasks. The first one was dedicated to packaging for power validation (ATL). This task was focused at package level and was analyzed in close collaboration with the studies done in WP6.4 at transistor level. Thermal simulations were performed with different types of package (Cu-Mo-Cu laminate and Kyocera CM4 proprietary package) and different carrier materials (Al and Cu). Their impact on the maximum channel temperature was evaluated for a 36mm power die versus the total dissipated power. Best results were obtained with CM4 based package and Cu carrier as expected in regard of the thermal conductivities of these materials. Also, the interest of diamond based heat spreaders was evaluated as well as the thinning of SiC substrate to reduce the thermal resistance. We showed that the best combination was to thin down the SiC substrate from 400µm to 100µm and to use a synthetic diamond heat spreader inserted between the SiC chip and the power device package. These solutions were adopted for the realization of the final amplifier in WP8.3.
The second task was focused on the evacuation of heat from the backside of the power device package toward the cold plate with the lower temperature elevation. A dynamic cooler was simulated at ATL and several versions were designed by IVF and ATL using the 3D-metal printing process of Fcubic (collaboration with WP4.3). For the measurements, a specific test bench was assembled at ATL. Initial coolers in steel were realized and tested to validate the approach while final versions in copper were realized at the end of the project thanks to the Fcubic copper based process. This original approach allows us to dissipate up to 100W on 1cm² with a relatively low water flow of 1l/min. The thermal resistance of the cooler was measured to 0.15°C/W up to 90W of dissipated power.
The objective of this third task was dedicated to board materials for device impedance matching. In order to realize compact amplifiers and reduce losses, impedance matching has to be realized as close as possible to the power die. In the frame of the MorGaN project, we developed impedance matching in package using high dielectric constant ceramic materials (K=36 & 80). Electromagnetic and 'circuit based' simulations as well as measurements were performed to extract electrical models of such high K transmission lines. These models were used in WP8.3 for amplifier design.
TASK 8.3. DEVICE TESTING (STARTING DATE : M9)
Leader : ATL Partners : IEMN, TUW
WP8.3 was focused on RF characterization. The first task was dedicated to on-wafer characterization of microwave test devices (ATL, IEMN, TUW). IEMN realized characterization of TUU devices at the state of the art power density of 11 W/mm (38% PAE) @4GHz using InAlN/GaN MOSHEMTS on SiC. TUW & IEMN studied the impact of the Source-Drain distance on the breakdown of normally-off n++ GaN/InAlN/AlN/GaN HEMT. Measurements of AlGaN/GaN HEMT devices on diamond substrate were also measured at 1.25W/mm at 6 GHz on metallic carrier. IEMN/MC2 realized on wafer measurements of elementary 2.4mm total gate width power devices at 2 GHz on CW mode on three generations of devices processed by ATL. The best results were achieved on the third generation: An output power density of 4.1W/mm with 51% of PAE was reached. A study on the impact of the field plate on pulsed I-V measurements and power results were also conducted showing an improvement of the performances of the device with a source connected filed plate on InAlN/GaN power devices. At ATL, power measurements were realized using short pulse setup at 3.5 GHz on elementary 2mm transistors. HEMT devices showed an output power of 6.6W/mm with 70% PAE at Vds=35V. At 2 GHz, under pulsed setup, an output power of 10.5W with 53% of PAE was reached on 2.4mm power transistor.
The second task was focused on RF power evaluation in L-Band at 2 GHz (ATL). Power die were mounted in package. The complete staking was realized thanks to analysis done in WP6.4 and WP8.2. The power die were thinned down to 100µm and mounted on TM180 diamond heat spreader before being soldered in CM4 based power package. Power measurements allow us to reach on a single 36mm power die an output power of 180W with 34% of PAE (Vds=40V, pulsed setup 10 µs/10%). A balanced version with two 36mm power die achieved an output power of 250W with 33% PAE at Vds=30V. A maximum power of 320W was reached.. The balanced version allows us to reach an output power of 180W with 31% PAE in CW in B class. All these results were achieved for the very first time using AlInN/GaN based devices and constitute the state of the art of the technology.
Pout = 41.2dBm (13.2W - 6.6W/mm) with PAE = 70% and Gp=13.4dB measured on wafer @3.5 GHz and Vds=35V (2mm device & short pulse setup). Pout = 40.2dBm (10.5W - 4.3W/mm) with PAE = 53% and Gp=16.2dB measured on wafer @2 GHz and Vds=40V (2.4mm device & CW setup).
Balanced amplifier realized at 2 GHz
250W - 33% PAE achieved at Vds=30V. 320W @ 40V.
WORKPACKAGE 9 : TRAINING (STARTING DATE : M1)
Leader : UoB Partners : All MORGaN partners
The multi-materials nature of MORGaN created opportunities for training. In addition, the range of research activities across the MORGaN workpackages necessitates a cross-fertilisation of capabilities and knowledge. WP9 therefore provided key support in terms of delivering support for research visits between MORGaN partners, supporting specific conferences related to MORGaN technologies and providing a residential course for training young researchers.
HIGHLIGHTS (UOB)
* There have been 17 rounds of WP9.3 research applications which have approved over 40 visits between MORGaN partners or attendance of key conferences/workshops (WP9.3).
* A MORGaN workshop was held at STU (24-26th May 2010) for training of young MORGaN researchers (WP9.2).
* WP9 supported 19th HETECH conference, October 18 - October 20, 2010 organised by MORGaN partner FORTH and ASDAM2010 held 25th-27th October and 2010 organised by MORGaN partner STU (WP9.1)
TRAINING ACTIVITIES DURING THE PERIOD (UOB)
RESIDENTIAL WORKSHOP
A three day training workshop for the MORGaN consortium held at STU and IEE on 24-26th May 2010 as part of the training workpackage (WP9.2). Twenty MORGaN students attended the three day event with students from STU, UoB, FORTH, ITE, ATL, CTU and IC. Full details can be found in Deliverable WP9.2 (M18). The MORGaN residential course provided seminars and practical workshops in a focused three-day residential course for younger MORGaN researchers. The workshop was hosted by the Faculty of Electrical Engineering & Information Technology (STU) with additional demonstrations at the Slovak Academy of Sciences (IEE). In order to promote the event details were included at WP10 dissemination newsletters, promotional material sent via email and presentations made at 6 months progress meetings. All of the 20 allocated places were filled with students attending from STU, UoB, FORTH, ITE, ATL, CTU and IC (Figure 26).
DAY ONE: The first day provided a welcome and introductory talk providing an overview of the MORGaN project and workpackages presented by Sylvain Delage (Figure 27). Presentations were then provided on GaN transistors, microwave characteristion, I-V, C-V and DLTS based characterization of GaN structures along with modelling of GaN structures. The afternoon provided laboratory demonstrations at STU of the characterisation methods described during Day 1. Characterisation data directly related to MORGaN materials and devices were presented, such as nanocolumn growth, AlGaN/GaN & InAlN/GaN HEMTs.
DAY TWO: On day two optical and analytical characterization methods were presented along with Auger and Raman spectroscopy, SIMS and AFM at STU. In the afternoon a short trip to the Slovak Academy of Science provided talks on XRD, FIB and TEM along with a visit of laboratories to show TEM, röntgen, FIB and clean rooms related to microsystems technology. A workshop dinner was held in the evening.
DAY THREE: The final day present talks on SEM, EBIC, reverse engineering with a visit to the analytical laboratories of STU and ILC. Hands on training was available to students and attendees were encouraged to bring sample materials and devices, to aid discussion and the opportunity for examination during the lab sessions. Day three also provided details on how to apply for WP9.3 Research Visits between MORGaN hosts.
Figure 26. Residential course at STU. Sylvain Delage (centre) with organisers A.Dent (UoB) and J. Kovac (STU)
MORGaN CONFERENCE SUPPORT: WP9 supported two conferences, namely the Advanced Semiconductor Devices and Microsystems (ASDAM) held on 25th-27th October 2010 organised by MORGaN partner STU and 19th European Workshop on Heterostructure Technology (HETECH) held on October 18 - October 20, 2010 organised by MORGaN partner FORTH. This provided opportunities for providing invited speakers and for MORGaN researchers to attend the conferences. Further details of the WP9.1 conferences can be found in Deliverable 9.3 (M24) "Training activity report for Year 2". Attendance of additional conference and workshop was also supported by the Research Visits (below).
Figure 27. Welcome introduction (Sylvain Delage, left and Jaroslav Kovac, right)
RESEARCH VISITS: From M1-M36 there were 17 rounds of 'WP9.3 Research Applications' whereby MORGaN researchers from one partner are able to spend time at another MORGaN partner to learn new skills, transfer knowledge to a partner, undertake measurements/characterisation etc. The application procedure involved a simple two page application form that requires details of Applicant, Host Institution, Research Plan, Linkage to MORGaN WPs and estimated visit length and travel/subsistence costs. WP9.3 has also supported visits to a conference/workshop if it is highly aligned with MORGaN (e.g. ASDAM, ICNS-9). All applications required approval by the Project General Assembly via Doodle Poll. Between M1-36 the research visits have provided excellent opportunities for researchers to interact. Full details of the seventeen rounds of visits can be found in the Annual Training Reports (Deliverables 9.1 (M12), 9.3 (M24) and 9.4 (M36)). Fig. 9.3a shows an example whereby a number of WP9.3 visits between Glasgow, Ulm and Wien (e.g. by Rossi, Alomari and Ostermaier) has enabled a strong collaboration between WPs 5 and 6. Dissemination of this collaboration was at an international event (also supported by WP9) which has provided new contacts for the MORGaN newsletter for WP10 activities. Similarly WP9.3 funded visits between UoB, SWEREA, UJF and IEE (e.g. by Rufer, LeBoulbar, Vanko) allowed a fruitful collaboration between modelling (WP6), packaging (WP4), drumskin sensor development (WP7) and high temperature and electrical characterisation. This lead to presentation of the drumskin sensor device at ICNS-9 in Glasgow (Fig 9.3b).
(a) (b)
Fig. 9.3. Examples of interaction of WP9 visits.
Potential Impact:
WP10. DISSEMINATION (VIV)
Leader : VIV
Partners : All MorGaN partners
MORGaN has benefited from the fact that the consortium is full of extremely active, focused and enthusiastic partners that recognise the importance of dissemination activity. In addition to the activities defined in the description of work, c. 40k€ was allocated to be spent on activities proposed by the consortium during the course of the project. This facility allowed a very flexible and pragmatic set of activities to be undertaken.
Given the wide range of technical topics covered by MORGaN, it was decided early in the project that the dissemination activity would have four themes: diamond substrates, III-N materials, harsh environment devices and packaging & metallisation. These themes were used in the website, posters, and other published material to give a characteristic image to the project.
HIGHLIGHTS (VIV)
* Website: The MORGaN public website has attracted over 2000 unique visits per month since Jan-2010, and includes videos, newsletters and other project information
* Industrial events: MORGaN had a booth or tabletop at six industrial trade shows and exhibitions
* Workshops: MORGaN members organised four workshops and training events
* Academic events: MORGaN has been represented at about 70 (non-MORGaN) workshops and conferences presented over 120 conference papers
* Refereed publications: Nearly thirty papers in world-renown journals.
DISSEMINATION ACTIVITIES DURING THE PERIOD (VIV)
Website (D10.4)
The website (www.morganproject.eu) has been online since Jan-2009 and has been kept up-to-date with all public material. The site includes pages on the "Consortium", "Related links" (including other FP projects), "Project news", "Events" and "Topics & results." All the public material, including videos, newsletters, presentation and flyers are available from the site. Thanks to good traffic, frequent updates and cross-links to other projects and partners, the search engine ranking remained good throughout the project; e.g. a search for "morgan gan" or "morgan fp7" returned the MORGaN site top on google.com google.co.uk and google.de (20-Oct-2011). The graph below shows the number of unique visits per month: a gradual rise to c. 2000/ month by Jan-2010 which was maintained throughout the project. The website will remain online for the foreseeable future.
Generic publicity material
* Presentation: A presentation was circulated for approval in Sep-2009 and made public Nov-2009. This was intended for ad hoc presentations by the consortium, as well as a useful overview
* Posters: Six different posters (project overview, consortium plus four technical overviews) were available in laminated form to all partners. These were used at several exhibitions and also for display at the partners' labs and offices
* Flyers: double-sided A5 glossy flyers were sent to all partners for use at all relevant external events
* Trade show items: 250 mugs with the MORGaN logo and two free-standing 2 m × 0.8 m banners were purchased (Jul-2011) for use at trade shows & exhibitions
* Newsletters: Six newsletters (D10.6-11) were produced and sent to the distribution list (D10.5). These maintained a consistent format throughout the project; typically 6-10 A4 pages, summarising technical progress and highlighting MORGaN-related events and news
* Brochures: The first brochure (D10.1) gave background information on the project and the final brochure (D10.2) gave a broad summary of the project achievements (22 page A4 pdf).
MORGaN-organised events
Four workshops were organised by MORGaN partners throughout the project: these are discussed in WP9.
1) HETECH 2009-18th European Workshop on Heterostructure Technology
Günzburg, Ulm, Germany (2-4 Nov-2009)
2) MORGaN Residential Course 2010
Bratislava (24-26 May 2010)
3) HETECH 2010-19th European Workshop on Heterostructure Technology
Fodele, Crete, Greece (18-20 Oct-2010)
4) ASDAM 2010-8th International Conference on Advanced Semiconductor Devices & Microsystems
Smolenice, Slovakia (25-27 Oct-2010)
Exhibitions and trade shows
MORGaN had booths, tabletops or posters at six major exhibitions to disseminate the MORGaN technology:
1) Nanofutures; Gijon, Spain 15-Jun-2010
Duncan Allsopp (University of Bath) attended this EC technology transfer event.
2) Industrial Technology; Brussels, Belgium 07-Sep-2010
Sylvain Delage (III-V Labs), John Weaver (University of Glasgow) and Simon Kinsella (E6) represented MORGaN at this event to improve the integration across disciplines, stakeholders and actors.
3) IMAPS 2010-International Microelectronics and Packaging Society; N. Carolina, USA 31-Oct-2010
Bob Musk (G&H) and Klas Brinkfeldt (Swerea IVF) manned a booth at this industrial-focused US trade show.
4) EuroSimE 2011-12th International Conference on Thermal, Mechanical and Multi-Physics 17-Apr-2011
Simulation and Experiments in Microelectronics and Microsystems; Linz, Austria
Klas Brinkfeldt & Dag Andersson (Swerea IVF) manned a MORGaN booth at this modeling & device conference.
5) ICNS-9-International Conference on Nitride Semiconductors; Glasgow, UK 10-Jul-2011 Toth Lajos (MFA) and John Weaver (University of Glasgow) ensured that a tabletop display was constantly manned at this key materials conference (at which nine MORGaN papers were presented).
6) EMPC 2011-European Microelectronics Packaging Conference; Brighton, UK 12-Sep-2011
Bob Musk (G&H) was in the MORGaN booth for this packaging event for IMAPS Europe.
Conferences
Apart from the events described above, MORGaN was represented, either presenting papers or distributing flyers, at almost seventy other events, from small national or academic society meetings to major international conferences. Over 120 papers were presented at such events during the course of the project! These events are listed here, since although rather long, it gives an insight to the extent and diversity of the activities:
WOCSEMMAD 2009-Workshop on Compound Semiconductor Materials and Devices; FL, USA 15-Feb-2009
SBDD XIV-Hasselt Diamond Workshop 2009; Hasselt, Belgium 02-Mar-2009
Living with Thermal Management: Applications in Harsh Environments; Oxford, UK 05-Mar-2009
PDI Topical Workshop on MBE-grown Nitride Nanowires; Berlin, Germany 05-Mar-2009
FOHEC 2009-Fibre Optics for Harsh Environments Conference; Yeovilton, UK 07-May-2009
PCIM2009-Power Electronics Intelligent Motion and Power Quality; Nuremburg, Germany 12-May-2009
WOCSDICE 09-Workshop on Compound Semiconductor Dev. & ICs, Malaga, Spain 17-May-2009
4M Workshop "Devices for harsh environments"; Vienna, Austria 08-Jun-2009
Jaszowiec 2009-38th Int. Sch. & Conf. on the Physics of Semiconductors; Krynica-Zdrój, Poland 16-Jun-2009
E-MRS 2009- Materials Research Society Spring Meeting 2009; Strasbourg, France 21-Jun-2009
DRC09-Device Research Conference; PA, USA 22-Jun-2009
TWHN 2009- 8th Topical Workshop on Heterostructure Microelectronics; Nagano, Japan 25-Aug-2009
ISCS 2009- 36th International Symposium on Compound Semiconductors; CA, USA 30-Aug-2009
Microscopy 2009; Graz, Austria 30-Aug-2009
Diamond 2009; Athens, Greece 06-Sep-2009
SEPNET (South East Photonics Network) meeting; Havant, UK 30-Sep-2009
216th Meeting of the Electrochemical Society; Vienna, Austria 04-Oct-2009
ICNS-8- International Conference on Nitride Semiconductors; Jeju, South Korea 18-Oct-2009
Slovak Ministry of Education "Centres of Excellence" exhibition; Bratislava, Slovakia 05-Nov-2009
M&N Society Symposium 2009; Athens, Greece 06-Nov-2009
Materials Research Society Fall Meeting 2009; Boston, USA 30-Nov-2009
IEDM 2009- IEEE International Electron Devices Meeting; MD, USA 07-Dec-2009
5th IC-AMRS-5th Int. Conf. of the African Materials Research Society; Abuja, Nigeria 14-Dec-2009
NIMACON 2009-8th Nigerian Materials Congress; Abuja, Nigeria 14-Dec-2009
WOCSEMMAD 2010-Workshop on Compound Semiconductor Materials and Devices; CA USA 14-Feb-2010
16th International Winterschool; Mauterndorf, Austria 22-Feb-2010
MSW 2010-Micronano System Workshop 2010; Stockholm, Sweden 04-May-2010
NDNC2010-New Diamond & Nano Carbons; Suzhou, China 14-May-2010
WOCSDICE 2010-Workshop on Compound Semiconductor Dev. & ICs; Darmstadt, Germany 16-May-2010
PCIM-Power Conversion Intelligent Motion; Nuremberg, Germany 17-May-2010
FOHEC 2010-Fibre Optics for Harsh Environments Conference; Swindon, UK 18-May-2010
CMOS-ET 2010-CMOS Emerging Technologies Workshop; Whistler, Canada 19-May-2010
ICMOVPE XV- Int. Conf. on Metal Organic Vapor Phase Epitaxy; NV, USA 23-May-2010
JNRDM 2010- Journées Nat. du Réseau Doctoral en Microélectronique; Montpellier, France 07-Jun-2010
Mikon 2010- 18th Int. Conf. on Microwave, Radar and Wireless Comms; Vilnius, Lithuania 14-Jun-2010
ISGN3-Growth of III-Nitrides; Montpellier, France 04-Jul-2010
ICPS 2010-30th Int. Conf. on the Physics of Semiconductors; Seoul, Korea 25-Jul-2010
MBE 2010-16th Int. Conf. on Molecular Beam Epitaxy; Berlin, Germany 22-Aug-2010
Diamond 2010; Budapest, Hungary 05-Sep-2010
EUROSENSORS XXIV; Linz, Austria 05-Sep-2010
OEPG 2010- 60th Jahrestagung der Österreichischen Phys. Gesell.; Salzburg, Austria 06-Sep-2010
E-MRS 2010; European Materials Research Society Spring Fall Meeting; Warsaw, Poland 16- Sep-2010
IWN 2010- International Workshop on Nitride semiconductors; FL, USA 19-Sep-2010
MNE 2010-36th International Conference on Micro and Nano Engineering - Genoa, Italy 19-Sep-2010
MME 2010- 21st Micromechanics & Micro system Europe Workshop; Enschede, Netherlands 26-Sep-2010
European Microwave Week 2010; Paris, France 27-Sep-2010
Euripides Forum; Paris, France 30-Sep-2010
Micro & Nano 2010; Athens, Greece 12-Oct-2010
4M 2010 Conference; Oyonnax, France 17-Nov-2010
Materials Research Society Fall Meeting 2010; Boston, USA 29-Nov-2010
RSD 2010- Reactive Sputter Deposition Symposium 2010; Ghent, Belgium 09-Dec-2010
SBDD XVI- Hasselt Diamond Workshop 2011; Hasselt, Belgium 21-Feb-2011
German-Polish Conf. on Crystal Growth 2011; Frankfurt (Oder), Germany/Slubice, Poland 14-Mar-2011
Microscopy of Semiconducting Materials 2011; Cambridge, UK 04-Apr-2011
E-MRS 2011 - Materials Research Society Spring Meeting 2011; Nice, France 10-May-2011
NANOPACK workshop on Thermal Management; Paliseau, France 23-May-2011
WOCSDICE 2011-Workshop on Compound Semiconductor Dev. & ICs; Catania, Italy 29-May-2011
DRC 11-69th Device Research Conference; Santa Barbara, USA 20-Jun 2011
EMF 2011 2011-European Meeting on Ferroelectricity; Bordeaux, France 26-Jun-2011
IWASI 211-4th IEEE Int. Workshop on Advances in Sensors and Interfaces; Brindisi, Italy 28-Jun-2011
International Conference on Additive Manufacturing; Loughborough, UK 07-Jul 2011
Diamond 2011; Garmisch-Partenkirchen, Germany 01-Aug-2011
MNE 2011-Micro and Nano Engineering; Berlin, Germany 19-Sep 2011
Solid State Devices & Materials 2011; Nagoya, Japan 28-Sep 2011
ACSIN 2011-Atomically Controlled Surf., Interfaces & Nanostructures; St. Petersburg, Russia 03-Oct-2011
European Microwave Week EuMW 2011; Manchester, UK 09-Oct-2011
Compound Semiconductor IC Conference; HI, USA 16-Oct-2011
IEEE Sensors Conference; Limerick, Ireland 28-Oct-2011
Videos
Five videos were recorded at the 18M meeting in Jul-2010:
* Project overview Sylvain Delage III-V Labs
* Diamond substrates Tim Mollart E6
* III-N material development Duncan Allsopp University of Bath
* Packaging and metallisation Per Johander Swerea IVF
* Harsh environment devices Ulrich Heinle MicroGaN
A professional company was used to record and process the videos, paid for from the WP10 fund, and the five videos went online in Nov-2010.
Publications
Two articles were published in Compound Semiconductor magazine, and a final article is planned for Jan-2012:
* "EU GaN project shows diamond promise," Compound Semiconductor magazine (24-Jun-2009)
* "Europe turns to AlInN to push the limits of transistor and sensor performance," Compound Semiconductor magazine (01-Nov-2009)
* Final article (in progress) scheduled for Compound Semiconductor magazine Jan-2012
Twenty-seven papers for refereed journals were published from MORGaN work; full details are given in D10.3. These articles are all in highly esteemed journals including Journal of Applied Physics, Journal of Crystal Growth and Physica Status Solidi.
WP11. MONITORING OF INNOVATION (III-VLAB)
Leader : III-VLab Partners : All MorGaN partners
The aim of this workpackage was to enhance innovation for outputs issued from MORGaN project which is more a technology driven one, where we consider the future market as one of key success factors. It was based on the so-called MIM© method. This work package activity started on Month 15 to define a set of parameters to be filled by the partners. This initial activity was carried by a set of 7 members of MORGaN consortium. Finally matrixes were filled by about 15 partners, with exception mostly from the academia world. This exercise was interesting and not often realized in such type of relatively long term research project. We hope that will improve the innovation process for the MORGaN participants, and that even improved MIM tools could be applied to additional cases and project.
The questionnaire treatment was carried out by Bernard Monnier, inventor of the MIM© method, helped by Sylvain Delage, MORGaN project coordinator.
* This Workpackage activity started on time at M15.
* A partners' pioneering panel was defined for establishing a suitable questionnaire to evaluate the potential innovation seeds stemming from MORGaN project.
* A matrix was prepared and submitted to the defined panel.
* Afterwards this matrix was applied to different identified innovations.
Monnier's Innovation Matrix tool
The Monnier's Innovation Matrix© (MIM©) is a new tool to measure the innovation level of an offer (product and/or service). This tool is mainly composed of:
* A metric tool: a complete process to measure the maturity of innovation. The MIM© is a systematic metric/measurement system that supports assessments of the maturity of a particular innovative offer and the consistent comparison of maturity between different types of innovative offer. 7 levels are proposed in order to evaluate innovation maturity. MIM© is a two-dimensional matrix where market (demand) and ideas (supply) are represented on the axes. Many parameters are considered for assessing each axis. Some templates are proposed as a guide for the different phases of the process.
* A methodology: a complete process for moving from one quadrant to another more favorable one in order to improve innovation level for a strategic view of the future.
This matrix could be considered as a standard measure for different products, similar to a diagnostic framework where you may identify the parameters to be focused on in order to improve the innovation level.
The MIM© is split into seven areas (see), those distribute innovation in seven levels with the following semantics:
* LEVEL 1: There is only a preliminary idea for a business or a product (or service) to be evaluated. The market is not really identified. The solution to the problem is poor and needs to be confirmed. It is the lowest level of innovation
* LEVEL 2: There is a technical idea, a concept, a product or a service to be promoted in a market which is not yet identified
* LEVEL 3: There is an identified market but not a solution to answer this demand
* LEVEL 4: There is a product/service and an identified market for it.
* LEVEL 5: There is a sophisticated product/service and an identified market for it
* LEVEL 6: There is a product/service and a huge identified market for it.
* LEVEL 7: There is a sophisticated product/service and a huge identified market for it, which is the highest level of innovation.
Figure 28. Monnier's Innovation Matrix©: the Innovation in 7 levels
This concept is similar to the TRL (Technology Readiness Level) evaluation about the maturity of a particular technology. TRL has 9 levels while MIM© has 7 but it' the same idea. The "Y" axis of the MIM© takes into account this specific metric.
The performance of the measure depends on the assessment of the axes; this work package will address this point. It also depends on the accuracy of the information provided by assessment of each axis. This WP will be dedicated for activities in order to make reliable the information included in this matrix.
Electrochemical sensors as an example of MIM analysis
* TUU: Device sensor processing
* Gwent Group: Sensor product.
* Main Concerned Work Packages: WP6 - WP7 - WP3
The University of Ulm was very involved in the development of sensors for electrochemical applications based on InAlN/GaN materials. Figure 29 shows the MIM analysis. If the demonstration is clearly original (starting point on the upper left of the matrix), the challenges will be the development of the manufacturing capability and the patent protection. One of the strength of the innovation is the capability to process large wafers and to keep potentially reasonable costs. The path towards the MIM Level 7 is not yet well foreseen. Figure 30 shows the radar plot of the MIM electrochemical sensor, which shows the strength of different factors along the years.
Figure 29. Expected innovation stemming from InAN/diamond based electrochemical sensors
Figure 30. Radar plot concerning the electrochemical sensors innovation.
List of Websites:
www.morganproject.eu
PUBLISHABLE SUMMARY
The MORGaN project was aimed at developing new materials for electronic devices and sensors that could operate in extreme conditions, especially high temperatures, highly corrosive solutions and high electric fields. This was based on exploiting the excellent physical properties of diamond and gallium nitride (GaN) based heterostructures for active and sensing devices. The packaging and metallisation of electronic devices or sensors based on these novel materials are equally important considerations in extreme conditions and environments. In addition to chemical stability, metal contacts must be stable and the package must be thermally compatible with the device requirements. Advanced 3D ceramic packaging and new metallisation techniques based on MN+1AXN alloys were also explored.
The project was successful and led to many outstanding outcomes:
* Si/polydiamond composite substrate development has been far more difficult than first expected but the MORGaN Consortium is quite satisfied by the first European demonstration of 2-inch wafers.
* The direct growth of GaN on single crystal and polycrystal diamond was studied. 2D electron gas confinements were mastered on both type of crystalline diamond structure (World premiere).
* The development of GaN growth on a variety of substrates (sapphire, silicon carbide, silicon, composite) using specific compliant layers and nucleation scheme or interlayer to accommodate crystalline and thermal expansion mismatches.
* The first HEMT obtained by direct growth of a GaN heterostructure on single crystal diamond was demonstrated which exhibited microwave operation with cut-off frequencies in the 40GHz range (World premiere).
* InAlN/GaN HEMT growths on composite Si/polydiamond composite substrate were realised.
* The first HEMT with the upper surface coated with nanocrystalline diamond (NCD) showing current gain cut-off frequencies in 40GHz range.
* In the sensing area high temperature pressure and electrochemical sensors were developed including their associated packaging. A tight interaction between the Academics and SME has been a real asset to achieve working sensors. Sensors working up to 80bar were demonstrated and testing temperatures up to 450°C was utilised. Excellent electrochemical sensors with fast reacting time were demonstrated.
* A robust packaging process based on ceramic materials and silver interconnects has been developed. The packaging technology has been successfully temperature cycled from 22°C to 650?C.
* Demonstration of efficient 3D heat exchangers using copper based on ink-jet technology.
* InAlN/GaN interest was confirmed for microwave applications with active devices capable of attaining 6.6W/mm at 3.5GHz with power added efficiency (PAE) of 70% in Continuous Wave (CW). Demonstrations of output power of 180W in CW with PAE of 35% and up to 320W were obtained. This is a world record for a InAlN/GaN HEMT.
* MORGaN gathered leading partners in physical and thermal simulation, detailed characterization and device modelling. This set of scientific activities has been very important to provide the optimum research direction, to prepare and to design the required components.
* Training was included in MORGaN and that was an efficient method to provide state of the art expertise to PhD students and young scientists.
* Intense dissemination activities were launched with 27 articles and more than 175 presentations at major events.
Project Context and Objectives:
PROJECT OBJECTIVES
INTRODUCTION
In general for electronic sensors and devices, conditions that cannot be met by Si may be called harsh. The harsh environment can be external, for example high temperature or pressure, or could be internal to the device, as a consequence of power dissipation under high current flow at high bias. Devices and sensors designed to operate in such environments need new semiconductor materials which are stable, especially at high temperature and have substrate and package combinations that enable rapid heat extraction or capability to withstand high temperature. Chemical inertness is also an advantage, especially if one wants to monitor highly corrosive chemical agents. For example, Si MOSFET operation is restricted to 450°C due to its low energy band gap .
Diamond has been known for centuries for its excellent optical and mechanical properties. Another property of diamond, which is less well known to the man in the street, is the tremendous thermal conductivity, reaching 2,000 Wm-1°C-1 for mono-crystal, which is the highest of any other solid material. It is followed by silicon carbide and metals like copper, which show a thermal conductivity 4 to 5 times lower. As such, diamond is potentially the ultimate substrate for many high temperature or extreme power applications.
Gallium nitride (GaN) alloys were studied intensively 30 years ago but breakthroughs were demonstrated only about 15 years ago in optical applications (e.g. blue LED, blue laser, lightning, etc.) and more recently have demonstrated impressive power handling from DC to microwave operation with breakdown field reaching more than 5MV cm-1. These wide band gap materials are suitable for high voltage (>10 kV) switching applications. This is crucial for the next generation of efficient long distance power distribution systems required for geographically dispersed renewable energy sources. It is also highly desirable in many other, traditionally inefficient, electrical energy conversion systems, such as those used in trains. As a result a GaN/Diamond composite could replace silicon for extreme environments.
The III-N system has other desirable properties for sensor applications in extreme environments. It is the only highly polar semiconductor matrix that has ceramic-like stability and can form heterostructures. It has the highest spontaneous polarisation (for AlN), with a Curie temperature above 1000?C (for AlN). For example, a lattice matched III-N heterostructure with a built-in polarisation discontinuity is expected to enable transistor action above 1000?C. Furthermore, the high surface stability of AlGaN/GaN heterostructures enables gas sensing at 800?C , rivalling current SiC gas sensors.
The MORGaN project addressed the need of new materials for solid state electronic devices and sensors that operate in extreme conditions, especially high temperatures, highly corrosive solutions and high electric fields. These materials will have to take advantage of the excellent physical properties of diamond and gallium nitride (GaN) based heterostructures. The association of the two materials was expected to give rise to the best materials and devices for ultimate performances in extreme environments.
The packaging and metallisation of an electronic device or sensor were believed also equally important to ensure device operation in extreme conditions and environments. Indeed metal contacts must be stable and the package must be thermally compatible with the device requirements and chemically stable. Advanced 3D ceramic packaging and new metallisation techniques based on the emerging technology of MN+1AXN alloys were also to be explored.
The project covered fundamental material science researches, sensor and microwave device development including the appropriate packaging. All these activities were strongly supported by many teams involved in state of the art material characterization, simulations (mechanical, thermal, electronic transport and trapping effect), linear and non-linear circuit-oriented modeling, circuit design, and associated measurement (electrochemical, electromechanical, electrical (DC, pulsed, S-parameters, load-pull)), etc.
SUMMARY OF MORGAN TECHNICAL OBJECTIVES
MORGaN included the following main objectives as stated in the original description of work:
Semiconductor materials:
* Development of polycrystalline diamond/silicon sandwich hybrid substrates.
* Development of innovative compliant heterostructure to grow low defect density GaN film, including AlGaN alloys.
* Growth optimisation of InAlN/GaN heterostructures for electronic and sensing applications to be used under extreme conditions, and that on different substrates to achieve high performance keeping in mind the use in demanding equipment.
Thermal heat spreaders:
* Development of nanocrystalline diamond heat spreaders on active devices to decrease the device temperature.
Interconnection and packaging-type issues:
* Optimisation of stable MN+1AXN metallic interconnection to ensure use at high temperature,
* Development of innovative 3D manufacturing for sensors and high power applications.
Materials for sensors:
* Materials for pressure sensors at high temperature for temperatures above 500°C and possibly up-to 1000°C,
* Materials for analysing highly corrosive electrolytes.
Power applications:
* Development of HEMT heterostructures and related building blocks (from semiconductors, processing building blocks, heat exchangers, circuits and packaging) to deploy technologies required for up to 1-kW application for base stations.
All these studies were realized in the frame of a large consortium including 23 partners capable of carrying out deep material studies, physical and electrochemical simulations and modeling activities, and to engage studies on degradation phenomena. The materials development had to be compatible to 100mm diameter wafers or even larger for later on industrialization. Evidently such manufacturing development would not have taken place in this research project. The participation of SME and leading companies in diamond materials, epitaxial growth, sensors and power microwave electronics secured the use of technologies in case of success.
These materials development were aiming to increase the product durability (energy production, microwave power, aerospace telecommunication) and through sensors to improve process controls, decrease the risk of industrial hazards and increase safety.
MORGAN PROJECT WORK BREAKDOWN
Figure 1. MorGaN project structure
The project work was broken down in 11 work packages. Figure 1 shows the 8 different technical work packages and their main tasks. Additionally 3 work packages were addressing the training of scientists, the dissemination and the innovation. The technical achievements of MORGaN are listed thereafter. All the planned work has been carried out. However as expected in such a large project, some delays were faced by the Consortium. Back up solutions were decided to decrease the risk levels, and these have been quite effective. The MORGaN project was completed on time, which is intrinsically a performance when considering the challenging objectives. The contribution of all Consortium members has to be acknowledged for that achievement.
Project Results:
WP1 DIAMOND-BASED SUBSTRATES (E6)
Leader : Element Six (E6) Partners : MFA, ITE, STU
WP1 HIGHLIGHTS (E6)
* First working GaN transistor on (111) single crystal diamond and the demonstration of direct GaN growth on polycrystalline CVD diamond
* Developed a commercial capability for up to 150 µm of CVD diamond on 100 mm diameter single crystal Si wafers > 525 µm in thickness, with a thermal conductivity measured to be >1000 W m-1 K-1.
* Over 80 Si diamond composite wafers have been produced by WP1.2 for the MORGaN project work.
* Ultra-thin (<50 nm) Si layer on diamond used for hetero-epitaxial gallium nitride growth; the ultimate limit of the composite substrate technology. PCT/EP2011/060503 patent application filed 22/06/11.
* Developed 50 mm diameter, 2 µm silicon on 50 µm diamond composite wafer fabrication technology.
TASK 1.1. DIAMOND FOR DIRECT GROWTH (STARTING DATE : M1)
Leader : E6
Work package (WP) 1.1 supplied bespoke surface finishes on commercially available polycrystalline and single crystal diamond products for direct hetero-epitaxial growth of gallium nitride. Single crystal diamond samples were prepared with (100), (110) and (111) orientation for a systematic study of its effect on gallium nitride growth. Samples supplied to project partners by WP 1.1 include:
? 20 off polycrystalline 50 mm diameter wafers with Ra < 1 nm in local regions
? 25 off (100) & (110) orientated single crystal diamond 4.5 x4.5 mm plates
? 45 off (111) orientated single crystal diamond 3 x 3 mm plates
Single crystal diamond samples with a (111) orientation were specially prepared for MORGaN project partners and are not generally commercially available. The hardness of diamond is anisotropic with the (111) direction ~10% harder than the other (soft) directions. (111) orientation is typically processed with miscut of between 2° to 4°. The initial set of samples were processed to have a typical surface roughness (Ra) of <10 nm. In order to further investigate the growth of GaN on (111) diamond a series of 10 (111) samples were prepared with, a controlled tilt towards the (1-10) direction, and specific miscut angles of 0°, 2°, 3° and 4°. This level of control of tilt and miscut angle control in (111) samples was specially developed for the MORGaN project.
TASK 1.2. COMPOSITE SILICON/POLYCRYSTALLINE DIAMOND SUBSTRATES (STARTING DATE : M1)
Leader : E6
The silicon polycrystalline diamond substrate comprises of a CVD diamond wafer with a thin single crystal silicon surface bonded to it. Such a structure enables the indirect heteroepitaxial growth of compound semiconductor materials onto the polycrystalline CVD diamond. Diamond has an ideal set of heat spreading characteristics perfectly suited for high power density electronics applications such as radio frequency (RF) devices. Originally it was planned that WP 1.2 would deliver 50 mm diameter silicon on diamond composite wafers, to the MORGaN consortium for GaN heteroepitaxial growth, from month 3 to 6 into the project. This required WP 1.2 to develop a synthesis capability on single crystal (111) silicon and a capability to thin the silicon layer to less than 3 µm.
WP 1.2 developed a 100 mm diameter CVD diamond synthesis capability using microwave plasma enhanced technology, with a typical example shown in Figure 2.
The primary advantage of using microwave synthesis technology is that it results in a higher thermal conductivity grade than is available by the hot filament technique. However, there are some technical difficulties in preparing diamond layers using microwave synthess techniques on thin silicon substrates, as the high power density of the microwave plasma process and the high stresses generated by joining diamond layer to the silicon wafer can cause the wafers to buckle and shatter. WP 1.2 developed strategies to mitigate these issues and as result diamond on silicon composite (DOSC) wafers, with the following specifications, are now commercially available from E6.
Si Substrate Specifications
* 100 ± 2 mm Si wafers >525 µm
Diamond Thickness Range
* 1 µm to 140 µm
Diamond Thickness uniformity
* 100 mm wafer uniformity ±10%
* 50mm wafer uniformity ±5%
Figure 2. A typical 100 mm DOSC wafer ex-synthesis, viewed from the diamond side, with the diamond thickness values for 17 measurement points superimposed on the surface; illustrating the excellent uniformity of the wafers.
Once the DOSC wafer fabrication process had been developed, the plan was to rapidly develop a thinning process to turn the 100 µm thick diamond on 525 µm thick silicon composite wafers into 2µm thick silicon on 100 µm thick diamond composite wafers. How difficult it would be to develop a thinning process was under-estimated by both WP 1.2 and the consortium as a whole. The delivery of these 50 mm diameter substrates to the consortium took WP 1.2. 30 months. This resulted severe disruption to the rest of the project. It was realized that an unconventional approach to thinning the silicon was needed in order to deliver less than 100 µm thick silicon on polycrystalline diamond wafers. Both the stress in the silicon layer had to be minimized and the adhesion between the diamond and the silicon interface maximized. These demands presented significant technical challenges.
.As grown, a 100 µm diamond layer creates a tensile stress in the 525 µm thick silicon substrate that peaks near the interface at 130 MPa as Figure 6 illustrates it.
However, the stiffness of the diamond forces the silicon in to compression at the actual interface. In (111) orientated Si, these forces can be used to trigger cleavage of the (111) plane at a depth close to the interface plane. Since the adhesion of the CVD diamond and the silicon layer is relatively strong, a thin layer of silicon remains adherent to the diamond layer. Diamond silicon composite wafers can easily be cleaved when in the 10 x 10 mm size range as shown in Figure 3 Left. GaN growth has been demonstrated on the substrates produced via this mechanism as illustrated in Figure 3 right. This was recognized as an exceptional result as it is a demonstration that the ultimate thickness of the silicon layer can be less than 100 nm whist still maintaining the crystallographic orientation. However; controlling the thickness of the Si layer was found to be extremely difficult and this technique was not developed further.
Figure 3. Left A 10 x 10 mm silicon on diamond substrate prepared using the cleaving method. The Si layer can be as thin as 50 to 100 nm and at the edges as thick as 200 µm in the same sample,. Right A Cross section of a GaN epitaxial structure on CVD diamond, grown on a cleaved Si(111) surface. The GaN is c plane (200) with an X-ray rocking curve FWHM of 0.95°.
In the last year of the project, a route for fabricating of silicon on diamond composite substrates was found. This method exploited diamond growth on bespoke specification silicon on insulator (SOI) substrates. Finite element modeling was used to study the effect of different combinations of thicknesses of SOI wafers and diamond layers on the tensile stress component of the silicon layer at the interface. This drove an experimental program looking at how to make the handle silicon wafer thinner and use thinner diamond layers. Eventually; this leads to the use of an anisotropic chemical etching technique to thin the handle silicon wafer. Three 50 mm diameter silicon on diamond composite substrates have been produced using this process. These wafers along with over 60 other smaller samples have been used to grow heteroepitaxial GaN layers and a working InAlGaN - GaN HEMT transistor has been grown by WP 2 and fabricated by WP 5.
The prospects for producing a silicon diamond composite substrate that is larger than 50 mm in diameter depend on being able to increase the diamond layer thickness and to mitigate the effect of increasing the tensile stress in the silicon layer. Their usefulness for high power GaN devices is now dependent on demonstrating that this approach can deliver a real benefit for GaN device operation and be available in the sizes and specifications, particularly flatness, required by the compound semiconductor industry.
Figure 4. Left. A 55 mm diameter composite diamond silicon wafer with 50 µm diamond and 2 µm (111) silicon layer. Right. A cross section SEM, provided by WP1.3 of a composite substrate with a GaN structure grown on the silicon layer.
TASK 1.3. DIAMOND BASED SUBSTRATES - CHARACTERISATION (STARTING DATE : M1)
Leader : MFA Partners : E6, ITE, STU
WP 1.3 provided the basic microscopy and characterization techniques required to aid the materials development. MFA developed specialist cross sectioning techniques required for dealing with diamond materials. The ability to perform high resolution transmission electron microscopy (HRTEM) on diamond samples without introducing damage or graphitization is a world class capability. Detailed characterization of the diamond to silicon interface was undertaken to enable the optimization of the adhesion at the silicon diamond interface. In Figure 5 the HRTEM image of the interface, together with the carbon and silicon element maps shows that the transition between the CVD diamond and the silicon occurs abruptly via a 5 nm SiC cubic phase and a 10 nm amorphous zone where there is limited mixing of silicon with carbon before the diamond layer is established.
Figure 5. Silicon diamond interface region at atomic resolution level, with the silicon map left, the HRTEM center and the carbon map right. This illustrates how abrupt the interface is with the first cubic SiC phase formed on the silicon surface, an amorphous transition zone and the polycrystalline diamond layer rapidly forming with little silicon contamination of the diamond layer.
STU explored the strain state of the diamond silicon interface using micro-Raman spectroscopy. Both diamond and silicon have distinct Raman peaks and the shift in the position of the peak is known to be proportional to the strain state. Using a microscope to focus the spectrometer the Raman response can be measured as a function of position. By preparing cross sections of the material STU were able to measure the strain state across the interface. A tensile stress in the silicon of ~130 MPa and the abrupt transition into compressive strain in the diamond layer was measured. Thus confirming the modeling results made in WP1.2.
Figure 6. Left. The tensile stress in the silicon layer as a function of distance to the interface with the diamond as measured by peak shift of the Si Raman peak. Right The compressive stress in the diamond layer using the same technique. The abrupt change in compressive to tensile stress together over the ~20 nm length of the interface was exploited when making the cleaved surface silicon on diamond composite wafers.
WP2 LOW DEFECT DENSTIY III-N MATERIALS (UOB)
Leader : UoB
Partners : AIX, FORTH, GEM, ITE, MFA, STU
The goal of WP2 was to establish new processes based on either metalorganic vapour phase epitaxy (MOVPE) or molecular beam epitaxy (MBE) for growing epitaxial III-Nitride layers for a range of new application of GaN based devices in harsh environments or capable of operating under harsh conditions where power dissipation will degrade device performance.
WP2 HIGHLIGHTS (UOB)
o Demonstration of crack-free GaN layers grown by on compliant substrates of diameter > 50 mm
o World first growth of GaN epitaxial layers by rf-MBE directly on polycrystalline diamond substrates
o World-first demonstration of cantilevers suitable for high temperature operation formed by epitaxial lateral overgrowth (ELOG)
o The epitaxial growth of device grade GaN/AlGaN hetero-epitaxial structures on composite Si/polycrystalline diamond substrates of ?50 mm diameter
o Achievement of rapid reductions in defect density in thin GaN layers grown on composite Si/polycrystalline diamond substrates
TASK 2.1. COMPLIANT SUBSTRATE TECHNOLOGY (STARTING DATE: M1)
Leader : UoB Partners : AIX, FORTH, GEM
The concept of a compliant substrate is based on the introduction of a thin nanostructured layer in the epitaxial structure to absorb some or all the strain introduced by a combination of lattice mismatch between the III-Nitride epitaxial layers and a non-native substrate, for example Silicon, and of the difference of coefficient of thermal expansion on cool-down from the temperature at which the III-Nitride layers are grown. The results presented here show the main advances achieved in this technology in the MORGAN project.
Growth of compliant structures by MOVPE
Compliant GaN layers formed on 50 mm Si substrates were delivered early in the project (deliverable 2.1.1) for detailed materials analysis. The innovation here was the etching through thin GaN and AlN layers, the latter acting as a growth nucleation layer that prevents chemical reaction with Ga and Si to exploit the lower stiffness of Si to maximize its scope for absorbing strain. The strain absorption was successful but inversion domains (regions of opposite polarity) tend to form. A combination of detailed TEM, SEM and SIMS analyses in WP2.4 revealed that the inversion domains coincided with small regions of high Si content in the coalesced GaN layer. These regions were shown to be related to either incomplete coverage of the Si layer by AlN or mechanical failure of the Si nano-pillar, i.e. cracking. The research then focused on patterning the Si substrate prior to growing the AlN nucleation layer. Whilst the GaN layer is not fully planarised, its thickness at 1.5 µm far exceeds the value (0.7 µm) at which a GaN layer is predicted to crack if grown on a Si substrate without stress mitigating layers. The Si nano-pillars absorb much of the strain. The structure is encapsulated by AlN eliminating the problem Si leakage and inversion domain formation. Finally, the regions between the nano-pillars are partially infilled, to reduce the air gaps in the structure and thus the barrier to heat conduction, an objection to deploying nano-pillar compliant layers in epitaxy designed for power electronics.
Growth of compliant structures by MBE
FORTH demonstrated the compliant substrate concept by growing rf-MBE nano-pillars and then coalescing them into a continuous GaN epi-layer. Figure 7(a) shows the pre-patterned SiNx growth mask used, with ?300 nm diameter windows through to the underlying GaN template. Figure 7(b) shows the arrays of smaller diameter nano-pillars that grow in the windows and Figure 7(c) shows the early stage of coalescence of the tops of the nano-pillar arrays. AFM measurements on the surface the platelets that start growing reveal a surface roughness of only 2-3 nm, to reveal how the rf-MBE process enables the much more uneven surface that exists at the nano-pillar cluster stage can be transformed into a high quality GaN epitaxial template.
Nano-ELOG approach
A key aspect of the compliant substrate concept is the reduction in the density threading dislocations that can be achieved, thereby improving material quality. This is best shown by the following work carried out jointly by Partners 1 and 20. The nanostructure used in this case is similar shown in Figure 7(a), but the epitaxial growth process used was nano-ELOG, a method in which the coalesced layer grows out laterally over the growth mask without leaving air gaps. Figure 8(a) a coalesced GaN epilayer formed by nano-ELOG and Figure 8(b) shows the a TEM image that reveals the strong dislocation bending that occurs in such structures with the results that density of threading dislocations reduces much more rapidly than would occur otherwise.
In summary, most the objectives of Task 2.1 were achieved in full. The only major deviation from the original work plan was that the compliant substrate technique was found to be unsuitable for mitigating strain in GaN epitaxial layers grown on composite Si/poly-diamond substrates though a combination of detailed simulations of the mechanical properties of the composite layer structures and measurements of the strain in Task 2.4 of the structures grown in Task 2.3. The person-months were re-allocated to Task 2.3 to ensure completion of this technologically and, potentially economically important activity.
TASK2.2. MATERIALS FOR CANTILEVERS COMPATIBLE WITH HIGH TEMPERATURE (STARTING DATE : M1)
Leader : UoB Partner : FORTH
The major achievements of this task are:
o The direct growth of GaN films on poly-diamond substrates by rf-MBE without a Si(111) inter-layer resulted in sufficiently ordered layers to be suitable for sensors operating by piezoelectric effect;
o Wide wing (up to 20 ?m) ELOG grown by double dog-leg growth window technique;
o Processes for fabricating low built-in strain double clamped beams and cantilevers from double-dogleg ELOG demonstrated.
Growth of III-Nitride layers directly on poly-crystalline diamond substrates
FORTH demonstrated the growth of dense GaN films with the characteristics of epitaxial layers on poly-crystalline diamond substrates without an intervening crystalline layer (usually Si) required for epitaxial growth. Initially ~ 100 nm thick porous GaN layer was grown at a substrate temperature of 800?C using N-rich conditions (III/V ratio = 0.2). Then the III/V ratio was increased to >1 to enhance lateral growth of the nano-pillars into a coalesced film. Figure 9 shows that a dense layer is formed after the coalescence step. The XRD rocking curve in Figure 10 is characteristic of a single crystal (0001) GaN film; however the FWHM of the ? - 2? scan, at 3 deg, indicates there is still some disorder, probably from twist and tilt. The photoluminescence is from the donor-bound exciton. The FWHM of this emission line, 8 meV, indicates a good quality layer.
Figure 9. Coalesced GaN layer grown directly on a poly-crystalline diamond substrate. Figure 10. XRD of coalesced GaN layer grown by rf-MBE directly on poly-crystalline diamond.
Based on these results, it is concluded that sufficiently ordered GaN layers can be grown directly on poly-crystalline diamond substrates by rf-MBE without a Si inter-layer to be suitable for sensors operating by piezoelectric effect. These results demonstrate one of the main premises in the original MORGaN proposal.
Growth of low-strain cantilever epitaxy by ELOG
The concept here was to exploit the low strain in GaN epitaxial structures grown laterally over a growth mask as a platform from which double clamped beams and cantilevers can be formed. The method involves a synergy between microfabrication, first to create the growth mask and then to release the beams or cantilevers from the ELOG material. The ELOG wings need to be wide enough to accommodate a HEMT to act as the strain/force transducer. To maximise the lateral-to-vertical growth rate ratio, the edges of the growth mask were aligned to the lines of the [1-100] directions in the c-plane. Figure 11 illustrates the overall concept. Figure 12 shows a GaN ELOG structure grown using the redeveloped growth mask. The width of the ELOG wings in this sample averaged 9 µm and the thickness variation was reduced to a level that structures could be committed to device fabrication. The maximum growth wing width achieved using the new process was 20 µm, more than enough to accommodate a HEMT transducer. Figure 13 shows a fully released beam clamped at each end of the double-dogleg structure and Figure 14 shows cantilevers formed from the ELOG material. The residual strain in the epitaxy arising from being clamped at each end caused some of the beams to arch upwards, but the distortion was relatively small. The cantilevers were unbent, demonstrating the basic premise of the ELOG approach, namely that the devices will operate as piezoelectric sensors with very low in-built strain, making their calibration easier.
Figure 11. Left: Schematic illustration of the double dogleg growth window (black line), the area of ELOG GaN (light grey) from which cantilevers are formed. Right: first release step involving photolithography and ICP etching Figure 12. Second series GaN ELOG grown from a double-dogleg growth window using the revised growth mask.
The scope for deflecting the ELOG beams and cantilevers was assessed using a probe mounted on a nano-positioner programmed to oscillate up and down by ?1-5 µm. The motion of the probe was such that the device was subject to lateral and vertical forces. The movement of the beams and cantilever was detected by its (a) physical movement and (b) shifts in the interference fringes arising from reflections from the GaN template below and the cantilever itself. Both device types readily oscillated without damage. The combined vertical and lateral movement was up to ?1-5 µm, representing deflections of ?5% of the length of the structure. Therefore, ELOG cantilevers and beams not only have low or zero in-built strain, there are mechanically robust. This demonstrated the other main objective of Task 2.2.
Figure 13. Double clamped beams after removing the SiNx growth mask.
Figure 14. Released cantilevers after removing the SiNx growth mask.
TASK2.3. GAN TEMPLATE ON SI/POLY-DIAMOND, POLY-DIAMOND AND NANO-DIAMOND SUBSTRATES (STARTING DATE: M6)
Leader : UoB Partner : AIX, FORTH
The main achievements of this task are:
o Demonstration of a method for fabricating crack-free composite Si/poly-diamond substrates suitable for the epitaxial growth of III-Nitride hetero-epitaxial structures by MOVPE in conjunction with WP1;
o Demonstration of epitaxial growth of crack-free III-Nitride hetero-epitaxial structures including a 0.5 µm thick GaN layer by MOVPE on composite Si/poly-diamond substrates of ?50 mm diameter;
o Characterisation work carried out in work package WP2.4 revealed there was a rapid reduction in the density of threading dislocations in the GaN layer, to indicate that device-grade epitaxial layers could be grown on these complex substrates;
o Demonstration of the conditions required for growing III-Nitride hetero-epitaxial layers on composite Si/poly-diamond including material for the GaN high electron mobility transistor (HEMT) in WP3.
The first "epi-ready" composite (111) Si/poly-diamond (PD) substrates were 10?10 mm and 20?20 mm squares and consisted of an ultra-thin layer of Si (111) on which a thick PD layer was deposited. First, the growth of a crack-free AlN nucleation layer that prevents any chemical reactions between the Si and Ga was demonstrated. Next, an Al0.2GaN layer (~50nm) and a GaN top layer of thickness between 300-700nm were grown over the AlN nucleation layer. X-ray diffraction (XRD) measurements were then performed and the GaN layer shown to be of high quality. The FWHM of its rocking curve is ~1100arcseconds (Figure 15), which is comparable to that of GaN grown on Si (111) substrates.
Figure 15. Rocking curve of GaN (0002) (thickness: 700nm) of a GaN/Al0.2GaN/AlN/Si(111)/PD multilayer structure.
The strain in the GaN/AlGaN/AlN/Si/PD multilayer structure was assessed at STU by micro-Raman scattering. It was found the ultra-thin silicon layer has acted as a complaint buffer layer between the high stiffness PD and the III-nitride layers without introducing a nanostructureaa. The Si (111) layer was severely compressed by the III-nitride multi-layer structure, with a compressive stress as high as -130MPa whilst the top GaN layer remained under a tensile stress of 503MPa, which is induced by the PD layer through the Si layer, the AlN layer and the Al0.2GaN layer. This stress interaction within the multilayer structure means additional compressive stress must be added designing the AlN-to-GaN alloy grading to introduce compressive strain between GaN and AlN. In this way it was found that crack initiation was successfully avoided and thicker layers of III-nitrides can be grown, enabling reductions in the threading dislocation density (TDD).
A third series of composite Si/poly-diamond substrates were provided to UoB and EPFL to enable the optimisation of the MOVPE growth of the strain-balancing heterostructure and subsequent growth of the GaN templates (UoB) and a full HEMT structure at EPFL, also grown by MOVPE. Figure 16 shows the successful growth of a crack-free AlN/AlGaN/GaN heterostructure on a wafer scale. The total thickness of the heterostructure is 1.2 µm. This is a break-through result and was followed up by the growth of a similar crack-free structure on a 48 mm diameter composite substrate.
Figure 17 shows a TEM image measured by MFA of a similar hetero-epitaxial structure. Whilst the defect density in the AlN nucleation layer is high, the TDD rapidly decreases with the GaN layer thickness to a value comparable to that found in GaN layers of similar thickness grown on Si(111) substrates, indicating that device-grade layers can be grown on such complex substrates. Finally, EPFL grew by MOVPE a mirror-like HEMT structure without cracks on a poly-diamond/Si(111) substrate. TUU then processed this structure into unpassivated HEMTs with 0.2µm gate-length. The resulting devices showed nearly 1A/mm Idmax with good pinch-off characteristics indicating that the Si layer was non-conducting, a requisite for high power devices.
Figure 16. Crack-free GaN/AlGaN/AlN grown on a 45 mm diameter composite Si/PD substrate. Figure 17. TEM images of Crack-free GaN/AlGaN/AlN grown on a 45 mm diameter composite Si/PD substrate.
TASK2.4. LOW DEFECT DENSITY SUBSTRATES AND STRUCTURES MATERIAL CHARACTERISATION (STARTING DATE : M3)
Leader : STU Partners : ITE, MFA, UoB
The successes in Tasks 2.1 2.2 and 2.3 could not have been achieved without outstanding characterization work and the excellent coordination with the technology teams achieved by the Task leader. Figure 8 toFigure 16 show examples of the characterisation results. Other examples and the role they played in underpinning successful outcomes in Task 2-1-2.3 are outlined here. Measurements of wafer bow at ITE enabled the advances both in the composite substrate technology developed in WP1 and in the subsequent growth of III-Nitride layers of device quality (Task 2.3). Further, it provided a basis for understanding the micro-Raman measurements of the strain in the III-Nitride layers grown on composite substrates, to enable the growth of thicker GaN layers. Figure 18 shows maps of the tensile stress in different III-Nitride heterostructures grown on composite Si/poly-diamond substrates determined by micro-Raman at STU. Figure 17 shows an example of the TEM analysis performed at MFA that underpinned optimisation of AlGaN stack incorporated into III-Nitride heterostructure to enable a dual purpose to be met, namely strain balancing and reducing the TDD.
Figure 18. Tensile strain in GaN/AlGaN/AlN heterostructures of different composition, alloy grading and thickness grown on Si(111)/poly-diamond substrates.
Other characterization work carried out included
* Detailed SEM and cathodoluminescence studies of coalesced GAN layers to assess defects
* SIMS characterization to assess semiconductor alloy composition and doping densities
* Photoluminescence
* X-ray diffraction analysis.
WP3 INALN HETEROSTRUCTURES (AIX)
Leader: AIX Partners: ATL, UoB, EPF, FOR, ITE, MF, STU
The main objective of WP3 was the realization of high quality InAlN/GaN heterostructures by MOCVD and MBE with optimized physical properties on all kind of different MORGAN relevant substrates. The consortium had selected three different substrates which were expected to have the potential to fulfil the MORGAN requirements in terms of thermal conductivity, high resistivity and mechanical and chemical stability: SiC, diamond and GaN-based compliant substrates.
The aim was to develop and optimize InAlN/GaN heterostructures on all these substrates. Best device structures should be supplied for device processing, optimization of the passivation and for the subsequent deposition of nano-crystalline diamond within the work packages WP5 to WP8.
To achieve the WP3 objectives a combination of advanced epitaxial growth methods and material analysis techniques have been used. The work package was divided into 5 tasks. The first 3 tasks were devoted to the MOCVD and MBE process development on the different substrates. In WP3.1 InAlN HEMT structures were optimized on SiC as a reference for the advanced substrates. Within this task most of the wafers have been produced as material basis for high power devices processed in WP8. WP3.2 has focused on epitaxy of InAlN based structures on hybrid and low cost substrates for sensor applications and in WP3.3 the direct growth on diamond has been explored. Finally the epitaxial processes have been evaluated regarding their potential for the mass production of InAlN/GaN heterostructures within WP3.4. All characterization work has been focused in WP3.5.
in WP3.5.
WP3 HIGHLIGHTS (AIX)
* MOCVD process development and optimization for AlInN/GaN/SiC HEMT structures. Reproducible production of AlInN/GaN HEMT structures with high resistive buffers and sheet resistance values below 200 ?/?
* More than 100 wafers, SiC and sapphire, have been delivered to WP4 to WP8.
* Demonstration of first MOCVD HEMT structure on composite poly-diamond substrate.
* Development of optimized AlInN HEMT structures on low cost substrates Si and sapphire for pressure sensors and chemical sensors, respectively.
* Demonstration of single crystalline (0001) GaN film growth by MBE on all three different SC diamond substrate orientations.
* First successful operation of an AlGaN/GaN HEMT on SC diamond and of an AlN/GaN HEMT on polydiamond substrates.
* Successful process transfer from 2" R&D MOCVD equipment to different MOCVD multi large wafer production systems for SiC, sapphire and Si substrates.
* Development and validation of AlInN MOCVD growth model.
* Extensive characterization to support the epitaxial material development.
TASK 3.1. EPITAXY ON BULK SIC (STARTING DATE : M1)
Leader : ATL Partner : AIX
The MOCVD growth process of InAlN/GaN HEMT structures was developed on sapphire and SiC substrates by ATL and AIX. The development of an optimized MOCVD growth process for a HEMT structure can be divided into two parts - the optimization of the buffer layer and of the AlxIn1-xN barrier. The most important properties of the buffer that need to be achieved are high crystal quality, low surface roughness and high resistivity while for the active part of the device structure material composition, crystal quality need to be controlled. AIX and ATL used the experiences from the ULTRAGAN project as starting point for the further optimization of the AlInN HEMTs structures, which consist in general of the SI SiC substrate, an about 2 µm thick GaN buffer layer followed by a 1nm thick AlN interlayer and on the top InAlN layer with varying thickness in the range 10-13nm and Indium contents from 13% - 21%. This general structure has been optimized by ATL and AIX with focus on the resistivity of the buffer, the thickness of the AlN interlayer and the thickness and composition of the AlInN barrier layer. The buffer quality has been examined by breakdown voltage measurements, the AlN interlayer and AlInN barriers have been optimized regarding highest possible sheet carrier density and mobility. Finally both partners were able to produce reproducibly AlInN/GaN HEMT structures with high resistive buffers and with sheet resistance values below 200 ?/? (figure 19).
Samples grown on sapphire and SiC were supplied for device processing and material analysis to the different partners by AIX and ATL (more than one hundred wafers delivered- see deliverables D3.1.1 to D3.1.3). Within the final reporting period still a significant improvement has been achieved by analyzing the growth conditions for the AlN interlayer. These growth conditions were found to have a strong influence on the physical properties of the InAlN/AlN/GaN HEMT heterostructures. The strain state, the growth mode, the thickness of InAlN and the electrical properties of the InAlN/AlN/GaN heterostructure are dependent on the AlN interlayer growth parameters. This is illustrated in figure 20.
Figure 19: Electrical characterization of optimized AlInN/GaN/SiC HEMT structures. The left figure shows the sheet resistance of a common HEMT structure with an average Rs value of 180 200 ?/?, the standard deviation is as low as ~1,5%. The right diagram shows the sheet carrier mobility as function of the ns value. Electron mobilities higher than 2000 cm2/Vs are possible for AlInN HEMTs.
TASK 3.2. EPITAXY ON HYBRID AND LOW-COST SUBSTRATES (STARTING DATE : M1)
Leader : EPFL Partners : ATL, AIX, FORTH, UoB
The processing of AlInN/GaN based electrochemical sensors required the possibility of mesa definition by the removal of the complete nitride stack. In order to mitigate the difficulties related to a deep GaN etch, the MOCVD growth on sapphire of AlInN/GaN high electron mobility heterostructures of reduced thickness was optimized. A 50 nm-thick AlN nucleation layer was used and the MOCVD growth conditions were tuned in order to achieve a very fast coalescence of the subsequent GaN buffer layer. The effect of a pre-growth nitridation of the sapphire surface on the heterostructure quality was also investigated. As result, we achieved fair electronic quality (µ>1100 cm2/V?s, Rsheet<400 ?/?) on HEMT structure having total thickness as thin as 120 nm.
MOCVD growth of GaN buffer structures and full AlInN-HEMTs have been optimized on Silicon (111) to be used for pressure sensors and as stating point for the growth on poly-diamond/Si(111) templates.
We performed the validation of poly-diamond/Si(111) templates developed in the frame of WP1. As expected from the higher thermal expansion mismatch with the poly-diamond, cracking issues are more pronounced on these templates than on Si(111). Nevertheless, mirror-like HEMT devices without cracks were obtained on Si/PD using a 260-nm-thick GaN buffer on 60-nm-thick AlN nucleation. Their crystalline quality is comparable to that on Si(111), as shown on the HRXRD scans of Figure 21(a). 0.2 µm gate-length devices show nearly 1A/mm Idmax [Figure 21(b)]. Their good pinch-off behavior shows that the 3 µm-thick Si(111) layer of the PD/Si template has good insulating properties after the poly-diamond growth fabrication step.
(a) (b)
Figure 21: (a) HRXRD Omega-2theta and Omega scans of an AlInN-HEMT structure grown on Poly-diamond/Si(111) template, compared with an identical structure grown on a Si(111) wafer. (b) I-V characteristics of a 0.2 µm-gate of the HEMT on Poly-diamond/Si(111) template.
TASK 3.3. DIRECT GROWTH ON DIAMOND (STARTING DATE : M1)
Leader : FORTH Partners : AIX, EPFL, UoB
FORTH and EPFL studied the heteroepitaxy of GaN by nitrogen rf plasma source MBE (RF-MBE) and NH3 gas source MBE (NH3-MBE), respectively, on single crystalline {100}, {110}, {111} and polycrystalline {110} and {111/311} diamond substrates. EPFL achieved the growth of crack-free (0001) GaN films, using NH3-MBE, on SC diamond {111} substrates, using a strain engineered interlayer. The typical RMS roughness was 0.6 nm on a 2×2 µm2 AFM image and the dislocation density about 8×109 cm-2. Hall effect measurements, at room temperature, revealed mobility and ns values of 750 cm2V-1s-1 and 1.4?1013 cm-2, respectively, for an AlGaN/GaN heterostructure, grown on top of a GaN buffer layer. This material was used to demonstrate the first GaN HEMT transistor on a diamond substrate. Idmax was 0.73 A/mm on devices with 0.2 µm-gate length, ft was 21 GHz and fmax 42 GHz.
FORTH demonstrated the growth of single crystalline (0001) GaN films on all the three different SC diamond substrate orientations. AFM scans revealed smooth GaN surfaces with RMS roughness of 1.6 nm. All GaN films were found to be under tensile stress, attributed to the different thermal expansion coefficients of GaN and diamond. Nitridation of the SC diamond substrates improved significantly the microstructure of the GaN films and eliminated the IDBs. Both N-face and Ga-polarity films were obtained. On the polycrystalline diamond substrates, FORTH achieved single orientation (0001) GaN films (Figure 22a). The GaN growth was optimized on the {110} texture polydiamond substrates and smooth GaN surfaces were obtained, with RMS roughness as low as 1 nm. Both N- and Ga-polarity films could be controllably grown. All GaN films were found to be under tensile stress. The optimized layers exhibited PL up to room temperature, with PL FWHM values as low as 12.5 meV at 24K and 40 meV at 300K. Eventually FORTH demonstrated the first successful operation of AlN/GaN HEMT devices on polydiamond substrates. Transistors with 1 ?m gate length, fabricated with photolithography, exhibited nearly 400 mA/mm current densities and good pinch-off behavior (Figure 22b). UoB and EPFL also explored the direct growth of GaN buffer layers on PC diamond using MOCVD. But this approach was not successful. Until the end of the project it was not possible to achieve a homogeneous GaN layer with sufficient structural quality for device applications. In conclusion, WP3.3 demonstrated the feasibility of developing GaN HEMT devices by heteroepitaxial MBE growth on polydiamond substrates, which are available with large wafer diameters. Details are described in deliverable reports 3.3.1 and 3.3.2
Figure 22: (a) XRD theta-2theta scan of a single orientation (0001) GaN film grown on polydiamond substrate (Left), (b) I-V characteristics of an 1?m gatelength AlN/GaN HEMT device fabricated from heteropitaxial GaN-on-polydiamond material
TASK 3.4. EPITAXIAL VALIDATION (STARTING DATE : M12)
Leader : AIX
The objective of this task was the evaluation of the mass production potential for the MOCVD of AlInN hetero-structures on all kind of "MORGAN substrates" including hybrid and diamond substrates as well as the definition of the best reactor concept for the large area growth. WP3.4 was divided into 2 sub-tasks; the process transfer from 2 inch R&D equipment into production type large area multi wafer reactors and the simulation of growth processes in production equipment.
Until the end of the project no large area (? 4 inch) diamond-Si hybrid substrates have been available and the direct MOCVD growth on polycrystalline diamond was not successful - see WP3.3. Therefore AIX focused on the growth on 150 mm Si substrates as an example for low cost substrates and ATL on the process transfer from 2 inch to multiple 3" SiC and sapphire substrates. To evaluate the influence of the reactor concept, horizontal gas flow reactor versus vertical showerhead reactor, AIX has used a horizontal 6 x 150 mm AIX2800 HT Planetary Reactor® whereas ATL used a new 7 x 3" Close Couple Showerhead (CCS) reactor, which has been installed during the last reporting period. In both types of reactor processes have been transferred successfully from R&D to production type equipment. AlInN bulk material and AlInN/GaN HEMT heterostructures with optimised physical properties have been demonstrated by ATL on 3" sapphire and SiC substrates. AlInN/AlN/GaN heterostructures with a good structural quality, sharp interfaces, a high semi-insulating GaN buffer and a good homogeneity of their electrical properties have been obtained with a good reproducibility from run to run on 3" sapphire and SiC substrates - e.g. a sheet resistivity of 216 ?/? with an uniformity of 1% was achieved on 3" SiC.
Today, the basis for MOCVD reactor design and optimization is the modeling of correlations between new reactor hardware and expected MOCVD process results. Prerequisite for the process simulation is the existence of a chemical model, describing the real growth conditions as good as possible. When MORGAN started good models for the MOCVD growth of GaN have been available but these models failed for the simulation of AlN containing materials due to complex chemical gas phase processes between the Al- and N-precursors. Based on the experimental results from WP3.1 and pre-existing know how regarding MOCVD chemistry for pure AlN, an improved growth model for the AlInN growth has been developed and was optimized in several iterations. The model has been validated by the correct prediction of the experimental results achieved in the 6 x 150 mm Planetary Reactor® for the AlInN deposition on large area Si substrates and can be used for further process optimizations regarding improved wafer uniformity on the 150 mm substrates.
WP4 HIGH PERFORMANCE MATERIALS FOR EXTREME ENVIRONMENT (IVF)
Leader : IVF Partners : ITE, GEM, SFO, VIV, FCUB, IC
WP4 HIGHLIGHTS (IVF)
- Multilayer ZrN/ZrB2 diffusion barriers that are stable and ohmic up to 800 oC for 10 hours in Ar atmosphere.
- Direct manufacturing of Cu coolers for WP8.
- Sealing with glass frit hermetic up to 1050 ?C.
- Interconnections based on Ag and Pt cycled to 650 ?C for over 500 cycles, total test time was over 750 hours.
TASK 4.1. MATERIALS FOR INTERCONNECTION (STARTING DATE : M1)
Leader : IVF Partners : GEM, IC, ITE, SFO, VIV
Our ambition in this task was to introduce new contact schemes based on MAX phases for harsh environment applications, such as high temperature (up to 1000°C), corrosive environment and high electric fields. Mn+1 AXn phases are ternary high temperature phases, where M is an early transition metal, A is an A group element (mostly IIIA and IVA) and X is either C and/or N. They consist of layers of Mn+1X interleaved with layers of pure A1. There are about 50 different phases known today, which have promising properties of combined ceramic-metallic behavior such as thermal stability and electrical conductivity.
However, as the stability at high temperatures is an essential requirement, Impact Coatings conducted a study on the phase stability of the investigated MAX phases. The study showed that, in contrast to reported high thermal stability for bulk, MAX phase coatings decompose already at temperatures barley higher than the phase formation temperature. The mechanism behind the decomposition is out diffusion and evaporation of the less tightly bound A atoms, followed by recrystallization and formation of carbides or nitrides.
Instead, focus in the task was shifted to diffusion barriers to conventional Ti/Al ohmic contacts, which would be based on multilayer stacks of refractory metal nitrides and borides, in particular ZrN, ZrB2, TaSiN and TiN developed at ITE. Refractory metals and their compounds are known for having a high thermal stability and from previous experience at ITE it was known, that the thermal stability of the films can be raised by combining different thin films into bi- or multilayer stacks due to the presence of interfilm boundaries, which, for films of different crystal lattice structures, inhibit interdiffusion effectively.
Two multilayer systems were developed: TaSiN/TiN-based one and ZrN/ZrB2- based one. The first, having a structure of 5 times (TiN/TaSiN) with a total thickness of 78 nm was shown to be stable at 800oC for 30 minutes in an argon flow. The Zr-based scheme had a structure of 13 times (13 nm ZrB2/13 nm ZrN). This scheme was stable at 800oC for 30 minutes in nitrogen flow and with subsequent annealing at 900OC for another 30 minutes, only slight interdiffusion was observed in the contact structure. When placed directly on GaN substrate, the barriers remained stable for 10 hours in argon atmosphere under 800oC, and the ohmic character of the junction was retained, at rc = 4.3 ×10-3 ?cm2 .
Figure 23. SIMS depth profiles for the structures after deposition (left) and after subsequent annealing at 800oC (middle) and at 900oC (right). Very slight Au diffusion observable after the last annealing.
TASK 4.2. MATERIAL FOR FLIP-CHIP MOUNTING (STARTING DATE : M1)
Leader : SFO Partners : GEM, IC, ITE, IVF, VIV
In this task we have investigated liquid flip chip connections. Two main problematic areas were found with the liquid contacts at high temperatures (above 400 ?C), oxide formation and incompatibility with the glass used to seal the package. See deliverable 4.2.4 for details.
TASK 4.3. MATERIAL FOR HIGH PERFORMANCE HEAT EXTRACTION PACKAGES
Leader : IVF Partners : FCUB, GEM
In this task we have worked with development of materials for layer manufacturing of cooling devices for WP8. The FCubic layer manufacturing process is developed for stainless steel and to increase the performance we have worked with adaptation of new materials such as silver and copper, which have much higher thermal conductivity, to the process. Silver is The results have shown that copper powder oxidizes easily in humidity and/or at elevated temperature in air, which causes binding of non-printed powder sections in the process conducted at 70-80 ?C in ambient atmosphere. After printing a thermal treatment at 200 ?C in air eliminates liquid parts of ink (glycol) and make printed component rigid to enable proper release. This phase causes severe oxidation and strong interparticle bonding within non-printed sections. To enable processing of copper this oxidation has to be avoided in the shaping sequence. We have used a protective coating of the Cu particles as a possible solution to this problem.
Coolers in copper were shaped, oxidized (3 or 5 h at 450 ?C) and sintered (2 or 4 h at 1050 ?C) and post-straightened in shape to correct the bending effects. Prior to assembling, the coolers were treated with acetic acid to remove surface oxide and subsequently coated for oxidation protection.
Figure 24. The dimensions change during the different process steps (left). Sintered copper coolers (right).
TASK 4.4. MATERIAL FOR HIGH TEMPERATURE ENVIRONMENT
Leader : SFO Partners : GEM, ITE, IVF, VIV
In this task we have worked with the adaption of the packaging of the two pressure sensors in WP 7. Early in the development in WP 7, potential difficulties with the cantilever pressure sensor packaging design was discovered and therefore it was a strategic decision to introduce the drumskin pressure sensor as a contingency. The work in this task has centered around materials for the packaging, sealing and interconnections of the high temperature pressure sensors, but the processes and materials used are generic and can be applied for other applications.
A planar and a cylindrical packaging concept were considered. The cylindrical form fits very well into applications where the pressure sensor should be fit into a bolt and screwed into of a reaction chamber, while the planar form has some advantages regarding manufacturing. The decision was made to use cylindrical packaging and a green state ceramic manufacturing process integrating Pt wires into the ceramic structures was developed. Leak tests in high temperature showed that a sealed pressure cell of alumina with electrical interconnections of platinum can be produced. When a glass was used to join alumina parts and to seal the electric interconnections the pressure cell was gas tight (leakage < 1x10-6 mBarl/s) from room temperature up to 1050°C.
Several materials for interconnection to a sensor chip have been tested in combination with the ceramic package. The best results in terms of electrical conductivity and temperature stability was shown using interconnects based on sintered silver nanoparticles. A test package using this combination of materials was successfully temperature cycled to 650 ?C (with the interval 30 min at 650 ?C, 30 min at 20 ?C, total time of one cycle 90 minutes). During temperature cycling the conduction through a pair of interconnects was monitored and show only minor degradation in the electrical performance after more than 500 cycles (). The total test time was more than 750 hours.
Figure 25. A diagram showing one temperature cycle and the degradation of the electrical conductivity of an early vs a late cycle (left). The package under test (right).
WP5 NANODIAMOND AND PASSIVATION (TUU)
Leader : TUU Partners : IEE, TUW, ITE, MFA, IEMN
The objective of this work package was to develop a new surface heat extraction technology for InAlN/GaN HEMTs, via the overgrowth of a highly thermally conductive nanocrystalline diamond films (NCD) on top of the HEMT device structure. The main challenge was to maintain the integrity of the device building blocks (epi-layer, ohmic and gate contacts and passivation) in the harsh environment of the NCD deposition process (between 700 °C and 800 °C for several hours in hydrogen-radical rich environment). Thus the technology developed should yield in a high thermal stability, allowing the fabrication of high frequency/high power HEMTs with an integrated top heat spreader.
All of the main objectives of this WP have been met and the work extended even further to explore alternative solutions and related applications. The main results of this WP are summarized below and can be found in detail in the contractual deliverables 5.1.3 5.2.3 and 5.3.4. They were achieved thanks to the intense cooperation and feedback between a large number of partners of various WPs, especially in terms of high resolution TEM analysis of the NCD films and coated HEMTs, SIMS profiling of passivation layers, small and large signal measurements of the HEMT devices, thermal measurement, simulations and high temperature testing. As well as achieving a fully processed, NCD-coated InAlN/GaN HEMT structure with essentially undegraded DC and small signal RF performance for the first time, the innovative highly thermally stable metallization and passivation technologies developed represent an important milestone concerning high temperature GaN HEMT electronics, were continuous large signal 1 MHz operation was demonstrated up to 1000 °C. This represents a world record of high temperature field effect transistor device operation achieved by the MORGaN consortium (for details see WP 6).
WP5 HIGHLIGHTS (TUU)
* Highly thermally stable ohmic and gate contacts and passivation schemes, a prerequisite for NCD overgrowth of a fully processed device structure, also serving as starting point for the development of a high temperature device structure operating up to 1000 °C. (TUU).
* Fully functional, gated HEMTs with 1 µm NCD overgrowth using two different nucleation techniques yielding current densities above 1 A/mm and cut-off frequencies ft up to 56 GHz. (TUU, NCKU).
* Optimization of NCD layers with isotropic thermal conductivities above 500 W/mK even for films as thin as 600 nm and vertical thermal conductivity approaching 1000 W/mK for 800 nm thick films (TUU, GLG, TUW).
* Development of essentially lag-free passivation using several passivation schemes including (a) thermally grown native oxide/ Si3N4 (TUU), (b) thermally grown native oxide/MOCVD grown Al2O3 (IEE), (c) in-situ Si3N4 (AIX, TUW and TUU) and (d) n+-GaN cap layer directly grown onto the InAlN/GaN heterostructure (TUW).
* MOSHEMT output power of 11.6 W/mm (at 2 GHz and 25 V drain bias) and cut off frequencies (ft and fmax) of 44 GHz and 105 GHz respectively achieved using novel thermally grown native oxide/ Si3N4 multi layer passivation stack (IEMN and TUU).
* High resolution TEM analysis (MFA) of heterostructure, passivation, ohmic and gate contacts, nucleation and NCD layers revealed the nature of grown films and their effects on HEMT structures essentially enabling the development of many critical steps of this new overgrowth and high temperature stable device technology.
* Thermal measurements (GLG) and simulations (TUW, GLG and TUU) for NCD films grown at different temperatures enabling to tailor growth parameters for optimal heat spreading effect.
TASK 5.1. DEVICE PASSIVATION (STARTING DATE : M1)
Leader : IEE Partners : TUU, TUW
The traditional insulation/passivation layer used in NCD growth is SiO2. However; using a SiO2 device passivation as seeding material for NCD overgrowth for heat sinking seems not feasible due to its low thermal conductivity. Thus, although this passivation was not suitable for the InAlN/GaN HEMT device structures developed here, it was used for initial overgrowth experiments to test the stability of the heterostructure and metal contacts. However, subsequently several other passivation schemes were developed and tested for temperature stability under NCD growth conditions (the indicator chosen was stability at 700 °C).
This was firstly the thermal oxidation of InAlN and subsequent passivation with PECVD Si3N4. The crystallinity and the thickness of the native oxide layers were analyzed using high resolution TEM. The optimized oxidation process (4 min. oxidation at 800 °C, 1.5 nm oxide thickness) was applied to HEMTs with 0.25 µm gate length yielding a current density of 2.4 A/mm, output power density of 11.6 W/mm at 2 GHz and 25 V drain bias. The result shows that the full channel charge density could be large signal modulated due to the elimination of current collapse effects. Cut off frequencies (ft and fmax) of 44 GHz and 105 GHz respectively were also achieved. This passivation scheme was applied for most of the NCD overgrown devices.
Secondly, this was a Si3N4 N+-doped GaN cap layers directly grown onto the heterostructure where the gate was recessed down to InAlN using highly selective, damage-free ICP RIE process. Due to surface charge screening. This configuration provides essentially gate-lag free device operation. A (1 hour) 700 °C test indicated no change (and thus the possibility to be used in overgrowth experiments).
A third configuration was MOCVD-Al2O3 on native oxide MOS_HEMT structures. Pulsed characteristics showed no essential current lagging at a drain current of 0.6 A/mm. Additionally gate leakage was reduced to less than 10-8 A/mm in combination with an of-state breakdown more than 100 V. Large gate length test HEMT structures were used in a comparative study with Schottky barrier HEMTs, HEMTs with thermal oxide passivation and MOS-HEMTs with a thermal oxide/MOCVD-Al2O3 multilayer passivation, with and without forming gas (FGA) treatment at 700 °C before the Ni/Au gate deposition. Devices sustained thermal stressing at 700 °C in FGA for more than 4 hours.
A fourth configuration was in-situ Si3N4 passivation of heterostructures during MOCVD growth. A chlorine-based etching process was developed to recess the passivation for ohmic and gate contact deposition without inducing damage to the heterostructure. Short gate devices (0.5 µm and 0.25 µm) were fabricated and yielded current densities of 1.2 A/mm and showed no gate lag effects in pulsed measurements.
TASK 5.2. NANOCRYSTALLINE DIAMOND DEPOSITION (STARTING DATE : M1)
Leader : TUU Partner : IEE
In this task nanocrystalline diamond films have been deposited using Hot Filament Deposition (HFCVD) onto InAlN/GaN heterostructures and devices on SiC substrate. Layers up to 6 µm have been deposited without structural damage and without any essential degradation of the interfacial 2DEG channel sheet charge density. To nucleate diamond growth Bias Enhanced Nucleation (BEN) and nanodiamond seeding are widely used; both have been used to outgrow NCD films and both have resulted in fully functional devices.
The main technology developed was based on Bias Enhanced Nucleation and Hot Filament CVD using thin amorphous Si interlayers on Si3N4, largely consumed during the nucleation process itself. Thus, no conductive surface pass is formed. The motivation to concentrate on this nucleation technology was twofold. Bias enhanced nucleation results in a covalently bonded interface to the substrate and thus a low thermal interface resistance. Secondly, this nucleation technology had already been refined for more than a decade for other applications before applying it to InAlN heterostructures.
A limited number of experiments have been performed using nanodiamond seeding provided by the research group of Prof. Tommy Tzeng at the national Cheng Kung University (NCKU, Tainan, Taiwan) in the frame of collaboration between NCKU and TUU funded by the Taiwanese Research Council. The nucleation process was followed by short growth (to obtain a closed film) performed by Microwave Plasma CVD. The growth is then continued in TUU by HFCVD. Outgrowth had been performed by HFCVD on 2" diameter (SiC) substrates or wafer pieces. Outgrowth parameters (temperature, pressure, nucleation density) were optimized for low graphitic content, controlled grain size development with film thickness, vertical columnar structure and low thermal stress.
The graphitic grain boundary network of NCD films may dominate the thermal properties. To limit this effect usually a high growth temperature above approx. 700 °C is needed. This temperature (and the H-rich growth atmosphere) may however degrade a GaN or AlGaN surface. In contrast the InAlN surface has been found to be essentially stable under such seeding, nucleation and outgrowth conditions. Thus this work had concentrated on InAlN/GaN HEMT structures. Optimization lead to the following conditions mostly used here: nucleation temperature: 750 °C for BEN and 550 °C for nanoparticle seeding, growth temperature: 700 °C to 750 °C, growth rate: 0.1 to 0.3 µm/hour. InAlN barrier layer thickness had been between 5 to 10 nm. NCD growth experiments up to 6 µm thickness were initially conducted on bare InAlN/GaN and device structures realized after NCD growth by selective NCD etching, confirming the heterostructure stability under growth conditions. SiC substrates did not show any restriction in growth thickness and uniformity (for 2" wafers). Only few experiments could be conducted on sapphire substrates showing a thickness limit of approx. 1 µm due to severe thermal mismatch.
Due to the high growth temperature, the H-rich growth environment and the long growth times of several hours a new contact technology had to be developed for ohmic as well as gate contacts. Au would become soft during NCD deposition and the passivation would crack. Thus, a Au-free ohmic contacts (Ti/Al/Ni/Cu/Ta) were developed and NCD films up to 5 µm thickness were grown on gateless HEMTs (With Si3N4 passivation) showing current densities of 2 A/mm after NCD deposition. Cu/Ta and Mo were used as gate metallization instead of conventional Au/Ni gates. These contact technologies then also served as basis for the development of high temperature stable devices as described in WP6. As passivation, thermally grown oxide/PCVD Si3N4 was used (see above). This seemed similar to the Si3N4 passivation commonly used in GaN based HEMT technologies. However, only Si3N4 films with low H-content would withstand the harsh growth conditions. Thus only few of the technologies developed and discussed in WP 5.1 could actually be successfully employed in the NCD overgrowth step. Fully functional gated HEMTs with 1 µm NCD overgrowth using the two different nucleation techniques discussed above yielded current densities above 1 A/mm and cut-off frequency ft up to 16.8 GHz (BEN) and up to 56 GHz (seeding). Successful overgrowth of fully processed HEMTs with films as thick as 3 µm was demonstrated with current density above 1 A/mm but still suffering from an increase in leakage current mainly due to a thermal budget of 30 hours at 750 °C. The HEMT overgrowth experiments were supplemented by growth experiments for TEM and thermal analysis performed in WP 5.3. This WP also provided uniform NCD growth on 4" Silicon on insulator wafers for WP 1, processing of AlGaN/GaN HEMTs on single crystalline diamond substrates for WP 3 and processing of InAlN/GaN HEMTs on Si/polydiamond substrates for WP 1, 2 and 3.
TASK 5.3. MATERIAL CHARACTERIZATION (STARTING DATE : M1)
Leader : IEE Partners: IEMN, ITE, MFA, TUU, TUW
Material characterization of the top diamond heat spreader focused on structural analysis by TEM (MFA) and thermal analysis by SThM (GLG). This accompanying work was performed continuously on several levels and served as basis for monitoring, modifying and optimizing the technology steps used in HEMT fabrication and overgrowth. Additionally, electrical characterization (DC, pulse, small signal, large signal) and SIMS profiling were applied and details are reported in the corresponding work packages.
Extensive high resolution TEM studies were performed on all critical elements in the materials stack: (a) the native oxide film formed by thermal oxidation, (b) the diamond nucleation interface including the role of the Si-interlayer and (c) the outgrown film and developing grain structures. The TEM images (together with elemental maps) performed on thermally oxidized InAlN/GaN HEMTs showed a homogeneous thermal oxide for short oxidation times (< 5 min) and an initial oxidation rate of 0.37 nm/min. The oxidation front starts to become clustered for longer oxidation times and leads to degradation of the electrical device characteristics. Thus this TEM study was essential to obtain the MOS-HEMT results reported in WP 5.1. High resolution TEM images also revealed the first stage of the BEN nucleation mechanism. SiC crystallites are formed on the top of the Si-interlayer, which serve as the nuclei for further diamond growth, providing indeed covalent bonding between the substrate and the NCD film. Similar analysis was performed on NCD films nucleated with nanoparticle seeding. TEM images of 0.25 µm NCD films nucleated by BEN and grown at different temperatures (700 °C to 800 °C) showed homogenous NCD coating of the heterostructure with V-shaped columnar growth profile in all cases, with an average grain size of around 100 nm. This analysis was then used to lower the growth temperature from 800 °C to 700 °C without change in growth morphology.
Additionally TEM images were performed on fully fabricated and NCD coated devices to observe the effect of the NCD growth on the physical device structure. Examination of the heterostructure, metal contacts and passivation did not show any visible degradation or metal diffusion into the InAlN confirming the high thermal stability of the heterostructure.
Thermal conductivity measurements were performed using a scanning thermal microscopy (SThM) method: a temperature sensing nanotip maps the temperature distribution in NCD films as they are heated up by a resistive heater fabricated on the sample. The data obtained for NCD films with different thicknesses were analyzed using thermal simulation models taking into account the thermal boundaries of the passivation and interlayers and the thermal conductivity of the substrate. For films of 600 nm thickness a thermal conductivity of about 500 W/mK was extracted, which is approximately ¼ of the ideal value for single crystal material. Due to the outgrowth of the grain structure, the conductivity profile should be thickness dependent. This was analyzed by NCD films etched in steps. In this way thermal mapping indicated a vertical thermal conductivity approaching 1000 W/mK for an 800 nm step, which is already half of the ideal value.
Additionally, when gateless HEMTs overgrown with NCD films were used as bottom heaters, thermal mapping indicated a cooling effect on the actual HEMT structure with a reduction in the thermal resistance by approximately 20% (measured using 300 nm thick NCD coating). Up to now no heat sink had been integrated on top NCD coating. However, a heat sink had been added by simulation, showing the effect of cooling independent of the substrate type (sapphire or SiC) or GaN buffer layer thickness. Detailed simulation results are reported in D 5.2.3.
WP6 PHYSICAL PROPERTIES AND MODELLING (TUW)
Leader : TUW Partners : ATL, CTU, GEM, IEMN, IVF, MG, SFO, STU, TUU, TUW, UFJ, VIV
WP6 HIGHLIGHTS
This work package (WP) covers several mostly characterization and simulation tasks providing input for demonstration WP 7 and WP 8. Physical models for transport in RF HEMTs, including self-heating and trapping effects (Task 6.2) and GaN HEMT- based sensors (Task 6.1) have been developed. The former have been used to develop non-linear transistor models at higher hierarchical level for RF power bars (Task 6.4). Methods have been developed to evaluate heat conductivity of nano-crystalline diamond over-layers (Task6.5). Channel temperature has been simulated for different kind of substrates and overlayer coatings (Tasks 6.4 6.5). Factors determining stability and degradation mechanisms of RF transistors (Task6.6) and sensors (Task6.3) have been identified.
TASK 6.1. THERMAL, MECHANICAL, AND PIEZO EFFECT SIMULATION (STARTING DATE : M1)
Leader : UJF Partners : CTU, MG
Detailed modeling of GaN-based particular pressure and strain sensors has been performed. Although the modeling was focused towards different GaN-based heterostructures as AlGaN/GaN, AlN/GaN, or InAlN/GaN, other materials potentially present in the final physical sensor device were also taken into account. The coupled-field analysis necessary for sensor modeling is complex due to the fact that the sensing mechanism is based on integrated HEMT element. Therefore, the electrical, mechanical, and thermal behaviors of different structures were studied separately. The electro-mechanical modeling was focused on AlGaN/GaN HEMT-based stress gauges employed in a cantilever-based strain sensor and in a diaphragm-based pressure sensor. To model the different physical phenomena participating in the sensor function, a full analytical model has been developed, confirming the feasibility of the sensing principle considered in the project. Simulation results based on real parameters document linear sensitivity characteristics for both sensor configurations. The theoretical sensitivity of the strain sensor is 14.4 A/N for a 520 µm long and 100 µm wide cantilever. The theoretical response of the pressure sensor is 0.97 mA/MPa for a range from 1 MPa to 10 MPa. For a load concentrated at the center of the diaphragm, the model provides a sensitivity of 0.77 mA/N in a range from 5 N to 50 N. The pressure and force ranges ensure a maximal displacement of 2 µm at the center of the diaphragm.
The coupled numerical thermo-mechanical finite-element modeling of composite cantilever and diaphragm structures has provided deflection, strain and stress behaviors of sensor structures in a large temperature scale. The thermo-mechanical model of the final device comprising sensing element and a package was also developed providing information about the sensor high temperature behavior in a steady-state and transient regime. Approaches to the modeling of AlGaN/GaN HEMTs in Silvaco TCAD environment allowing incorporating polarization effects (spontaneous + piezoelectric) were studied and an estimation of the pyroelectric effect on the sensor response was also obtained.
TASK 6.2. ELECTRICAL TRANSPORT (STARTING DATE : M1)
Leader : IEMN Partner : ATL
A new physical-thermal model, based on energy-balance transport model coupled with a heat diffusion equation, has been developed by IEMN to simulate the thermal effects in RF transistors. Influence of the lattice temperature on the transport properties everywhere in the active area is taken into account which accurately describes the electrical and thermal performances. The model is implemented by means of COMSOL® software, which uses a finite-element method. TLM devices and HEMT structures biased close to the operational conditions were simulated for different substrates using 2-D meshing not taking into account thermal coupling existing in large power transistors. At VDS=14V and VGS=0.0V the lattice temperature distribution in the active area is very different for the different substrates with a maximum temperature of 740K for the Si substrate, 560K for the SiC and only 420K for the diamond substrate. The electron energy peaks at the gate exit and its maximum value increases with the improvement of the thermal dissipation due to better transport properties. For an equivalent to 1mm width device, the thermal resistance, RTH rises versus the dissipated power from 2.5 to 5.2Kmm/W for a dissipated power P of P=35W/mm for diamond substrate, from 5.5 to 17.5Kmm/W for P= 23W/mm for SiC substrate and from 11.4 to 33Kmm/W for P = 10W/mm for a Si substrate.
Furthermore gate lag effect in In0.18AlN0.82/GaN HEMTs has been simulated using ATLAS/Blaze (Silvaco) by 35L. Drift-diffusion model under isothermal conditions is used. Both donor (Ndt) and acceptor (Nat) traps located in the buffer are taken into account. The analysis of current evolution as a function of the temperature and donor trap density shows that the traps in the buffer induce the current decrease with time. This decrease depends on the trap density Nat and saturates for Nat>1017cm-3. A maximum of the current occurs at 100µs. It is temperature dependent and vanishes for Nat=Ndt. The origin of this maximum is due to a hole capture phenomenon arising in the source-gate region, which lowers the access resistance and increases the drain current. Beyond this maximum, a hole emission takes place in both source-gate and gate drain area causing a decrease of the current due to the increase of the negative trapped charge in the buffer.
TASK 6.3. ELECTROCHEMICAL EFFECTS (STARTING DATE : M1)
Leader : TUU Partners : GEM, IVF
Electrochemical pH sensors, based on ion-sensitive field effect transistors (ISFETs) composed of pH-sensitive nanocrystalline diamond electrodes and AlInN/GaN HEMTs have been fabricated and analyzed. Their advantage compared to commercially available ISFETs based on silicon MOSFET technology is the extreme chemical stability of diamond in harsh environments, since the metal oxide films (e.g. TiO2 or Ta2O5) used the Si-based ISFETs degrade especially in highly alkaline electrolytes at elevated temperatures. Possible applications of our device can be found mainly in food industry, e.g. brewing industry. The pH sensitive element of the device is the oxygen-terminated diamond electrode, where the oxygen termination is obtained by wet-chemical treatment or by anodic polarization in alkaline electrolyte. High and stable pH sensitivity of 45-50 mV/pH has been determined from open-circuit potential measurements between the diamond and a pH-insensitive reference electrode. In addition, the nanocrystalline diamond electrodes showed no degradation even after exposure to hot (T = 75 °C) KOH-based solutions. One important characteristic of the ISFET is the pinch-off voltage, which should correspond to electrode potentials within the potential window of water dissociation of the diamond electrode. One of the two main parameters determining the pinch-off voltage of the fabricated ISFET sensors is the AlInN barrier layer thickness. It was adjusted to 6-7 nm, resulting in a pinch-off voltage of approx. -2 V. The second parameter which significantly shifts the pinch-off voltage of the full pH sensor (not the HEMT itself) is the gate leakage current determined by leakage across the surface passivation layer of the HEMT. Therefore, the choice of a suitable passivation layer is essential for the fabrication of highly sensitive and stable ISFETs. The fabricated ISFETs showed high pH sensitivity between pH ? 1 and pH ? 13 with low noise (see also task 7.2).
TASK 6.4. DEVICE MODELLING FOR HIGH POWER (STARTING DATE : M1)
Leader : ATL Partners : IEMN, STU, TUW
The first task was dedicated to Non-Linear Modeling. DC, small and large signal characterizations in CW mode were conducted on elementary devices of 2.4mm total gate width at IEMN/MC² on the three generations of devices realized during the project. The best performances were obtained on the third devices generation with an output power of 4.2W/mm with 55% of PAE and 20dB of linear gain at 2 GHz. Non-linear models were extracted on both device generations. Neuronal based models (IEMN/MC2) and phenomenological based models were developed and compared to solve convergence issues that occur on the whole power die composed by 15 transistors in parallel. Phenomenological based models allow us to obtain better convergence on the power die which was a key issue for the amplifier design in WP8.3. Models were validated on the elementary device and power die at ATL.
The second task was devoted to the prediction of channel temperatures by simulation for different substrates (polycrystalline diamond-based, composite Si/poly-diamond), different mounting schemes (flip-chip versus standard mounting) and, with and without polycrystalline diamond top-heat spreaders. These simulations were conducted in relation with WP8.2 related to package simulations. A maximal per-unit-length dissipated power of 6 W/mm for a channel temperature of 200°C is predicted with the most advanced solution with a 36mm total gate width power die (Diamond substrate with Kth=2200W/°Cm - thickness=100µm, with a backside chip heat spreader: Synthetic CVD diamond TM180 Kth=1800W/°Cm - thickness=500µm and a polycrystalline diamond top-heat spreader, a CM4 based power device package and copper carrier). Furthermore no improvement in thermal resistance has been found in GaN HEMTs grown on Si/poly-diamond/Si composite substrate in comparison to pure Si substrate.
Finally the mechanical stress of power amplifier has been evaluated as a function of temperature. Materials used in stacking have been evaluated from the point of view of their thermal expansion coefficients. The optimal final stacking was analyzed and compared to more conventional approach showing the relevance of the stacking used for the final demonstrator from a thermo-mechanical point of view.
TASK 6.5. THERMAL CHARACTERIZATION (STARTING DATE : M1)
Leader : GLG, Partners : ATL, IEMN, SFO, TUW
Highlights of this task include the development of a novel Scanning Thermal Microscope (SThM) probe for temperature measurement at the high temperatures typical for advanced GaN based devices, the use of microfabricated heaters on structured films to measure the thermal conductivity of thin films and interfaces and the development of advanced 3-dimensional models of thermal transport in these model systems to allow the independent extraction of numerical values for the relevant thermal properties. These measurement methods were particularly useful in enabling the measurement of the thermal conductivity of nanocrystalline diamond "heat spreader" layers. A particularly useful result of this work was the development of a set of analytical expressions for the variation of temperature with position allowing the extraction of the required values without the need to generate new models for each experiment, greatly aiding the practical application of the technique. The results of these measurements were fed back into the device modeling and device design program to allow rational optimization of the devices without the need to fabricate large numbers of test devices. The accuracy of the results obtained from the measurements was established by means of an extensive program of inter-comparison and calibration. The SThM method accuracy was confirmed by measurements of thermal conductivity on a monocrystalline diamond substrate of known thermal conductivity. This subsequently allowed the technique to be used to measure the thermal conductivity of the thin polycrystalline diamond substrates developed for MORGaN which were too thin to be measured by the conventional thermal flash technique. DC measurements of temperature rise in gateless transistors using SThM confirmed the quantitative utility of the heat spreader layers in reducing the average temperature rise of the operating devices investigated by approximately 24%. Both of these sets of results were compared with the results of modeling using the individual extracted values for thermal properties of materials, closing the loop from materials property measurement to device performance prediction.
The time-dependent thermal response of transistor - like devices was established using Transient Interferometric Mapping (TIM) and modeling and confirmed the beneficial role played by the incorporation of nanocrystalline diamond heat spreader layers under pulsed operation. In the case of a crystalline diamond substrate it was found that the channel temperature in pulsed operation saturates already after 1µs and that the thermal resistance was half of the values of devices on SiC, which was confirmed by use of micro-Raman temperature mapping.
TASK 6.6. STABILITY AND DEGRADATION MECHANISMS (STARTING DATE : M8)
Leader : ATL Partners : IEMN, STU, TUU, TUW, VIV
This task is related to a quick evaluation of reliability issues of RF transistors and sensors developed within the project.
Long term and temperature stability of gate contact and of surface preparations of InAlN transistors fabricated by ATL has been investigated. Tests of InAlN transistors with Schottky gate contact lead to the conclusion that the combination of Ni Schottky contact and ATL material and process was suitable for operations at junction temperatures lower than 100°C and bias voltage below 30V. The development of a MOS gate brought a huge improvement regarding higher temperature withstanding and breakdown voltages despite still a bit higher gate leakage currents than in AlGaN transistors. DC on-state tests have demonstrated promising stability at junction temperatures which are more than 200°C higher than in Ni Schottky contact devices. Reverse bias tests at 175°C were performed at drain voltages of 120V. A physical analysis of transport mechanisms over Ni gate/InAlN Schottky barrier using a four component model shows that tunneling current dominates compared to thermionic emission. Various parasitic leakage paths and advantage of oxidized gate contact in transport have also been analyzed. A study of stability of Ir/InAlN Schottky contacts at annealing temperatures as high as 700°C revealed a role of oxygen diffusion in Ir, but excluded Ir penetration into the InAlN barrier. Gate and drain-lag experiments combined with C-V measurement have been used to study traps in devices manufactured by MicroGaN on III-V lab material. The studied samples showed rather high traps densities and poor electrical stability. A good stability of output power, PAE and power gain during the microwave on-wafer measurements (VDS up to 40V at 2GHz) has been demonstrated on HEMTs with MOS gate from ATL, showing however an increased gate leakage current due to gate contact degradation.
A setup and method of transistor evaluation under DC and 1MHz operation beyond 1000°C has been developed. InAlN/GaN transistors operating at ambient temperatures of 1000°C were demonstrated and the information on suitable contact metals for high temperature operation was provided to WP8.
A double gate structure was developed for evaluation of charge-injection in passivation layers during long term off-state stress tests. This technique appeared more sensitive than monitoring of the other electrical parameters. Futhermore device parameters like Idmax, reverse leakage current,... degrade with reverse voltage stress more gradually in InAlN HEMTs as compared to AlGaN/GaN transistors. Effects of negative charge trapping (defect generation) causing gate current decrease (increase) have been identified.
Double heterostructure HEMT investigations have shown lower resistance degradation due to better carrier confinement with respect to single well HEMT.
Finally first long term temperature cycling experiment of packaged drum skin sensor shows promises for its high temperature operation. High
WP7 PROCESS AND MATERIAL VALIDATION FOR EXTREME CONDITION SENSORS (MG)
WP7 HIGHLIGHTS (MG)
WP7 is one of two demonstrator work packages of this project. The results of different work packages are put together in order to demonstrate mechanical and electrochemical sensors: crystal growth (WP2), packaging (WP4), diamond growth (WP6).
For the first time the proof of concept of two different AlGaN/GaN based pressure sensor approaches has been shown: Packaged drumskin and cantilever sensors have been measured up to 80 bar. The pressure ranges can easily be increased by increasing the sapphire substrate thickness in case of the drumskin or by increasing the stainless steel membrane thickness in case of the cantilever. Additionally, measurements at elevated temperatures have been performed: electrical measurements of packaged drumskin sensors at 350°C and sensing measurements of unpackaged cantilevers at 300°C.
The feasibility of two additional sensor concepts has been demonstrated: The deflection of ELOG (epitaxial lateral overgrowth) cantilevers has been monitored and the deflection of AlGaN/GaN membranes has been compared to simulations.
In the case of the electrochemical sensor with hybrid integrated diamond electrodes and AlInN/GaN FETs a high sensitivity in the range of 20 mA/mm per pH with a high resolution of approx. 0.05 pH can be reported.
TASK 7.1. HIGH TEMPERATURE CANTILEVER DEVICE FABRICATION AND TESTING (STARTING DATE : M4)
Leader : MG Partners : IEE, UJF, STU, UoB
The main part of WP7.1 was the process development of different approaches for AlGaN/GaN based high temperature pressure sensors. Additionally detailed modeling of the drumskin sensor and the packaging have been performed within this WP.
UoB has successfully demonstrated ELOG cantilevers with deflections of 6µm for ~5µm wide and 500µm long beams and 9µm for ~15µm wide and 500µm long double clamped beams. The lateral overgrowth is based on a lithographic process where a thin sacrificial SiN layer is structured and removed by buffered oxide etch after overgrowth in order to release the beams. This lithographic process makes it possible to use a double dogleg growth window which enables ELOG growth along optimum crystallographic directions (60°). The deflection was monitored by observing interference fringe shift while the cantilevers are deflected by a piezo-controlled nano-positioner.
For the design of the drumskin sensor simulations have been used by UJF and UoB to place six sensing elements at appropriate positions. UoB and UJF have developed mechanical models, which can be used to adjust the sapphire substrate thickness for targeted pressure ranges. IEE has developed a high temperature compatible fabrication process for this sensor. This process utilizes conductive metal oxides on the gate interface directly by thermal oxidation of evaporated and patterned thin Ni and Ir gate interfacial layers. This novel gate metallization increases the conductance and the devices do still exhibit the improved transport parameters in comparison to the conventional device after annealing at 800°C.
UJF has built a test rig for the drumskin sensor where a force is applied to the middle of the sensor. Based on these measurements a detailed model has been developed which shows a maximum sensitivity value for the central HEMT of 235 µA/µm.
MG has developed a fabrication process for AlGaN/GaN cantilevers on silicon substrates. In this process cantilevers are defined before the silicon substrate is selectively removed below them from the backside by silicon dry etching. The chip design includes a temperature sensor and two cantilevers in a Wheatstone bridge configuration where one cantilever is deflected and the other one serves as a reference in order to compensate temperature effects. The sensor signal has been monitored for different deflections in a temperature range from room temperature up to 300°C.
IEE has developed a sensor consisting of a circular HEMT on top of a 1.9µm thick AlGaN/GaN membrane. The process is similar to the cantilever process. The HEMT structures are processed and the silicon is removed from the backside. STU has characterized the mechanical properties of the membrane by µRaman scattering technique. The measurements determine the tensile residual stress of the membrane to 280 - 300 MPa. A non-linear behavior of maximal deflection with the applied pressure is predicted by ANSYS simulations. The maximal deflection of 40 nm calculated for the applied pressure of 10 kPa corresponds with that obtained from optical measurements.
TASK 7.2. ELECTROCHEMICAL SENSOR FABRICATION AND TESTING (STARTING DATE : M4)
Leader : TUU Partners : GEM, IVF
The combination of diamond electrodes with AlInN/GaN HEMTs for ion-sensitive FETs (ISFETs) can be done by monolithic integration on one chip or by hybrid integration. In the latter case, the diamond electrode, which in both cases is exposed to the electrolyte, is connected to an external AlInN/GaN HEMT.
Several problems of monolithic devices were identified during the fabrication of different ISFET chips, and not all of these problems could be completely solved yet. The main aspect is the stability of the interlayer like silicon nitride (which acts at the same time as the surface passivation layer of the HEMTs) during bias-enhanced nucleation: After nucleation, the gate leakage current of the HEMTs typically increases from nA to the µA-range due to leakage through the passivation (inter-)layer. Similar effects have also been observed in WP5, where nanocrystalline diamond is used as a heat sink for AlInN/GaN microwave power HEMTs. However, in the case of ISFETs, a high leakage also results in a significant shift of the threshold voltage in contact with the electrolyte. Due to the fabrication problems, a fully working monolithic ISFET device could not yet be demonstrated.
For instant tests of the FETs in combination with the NCD electrodes, and further applications as a portable device, an electrical housing was designed for implementing the FET chip. The FET chips were mounted in the center of a PCB board with Cu/Au-based conductive pathways. By using ultrasonic wedge bonding, the FET chip was contacted to 48 pads on PCB board, thus allowing a fast connection of the NCD electrode to transistors of different geometry parameters. The use of synthesis glass as a cover allowed simultaneous optical microscopic observation during operating the device.
If the NCD electrode is in contact with 0.1 M H2SO4 electrolyte almost full modulation is achieved with a threshold voltage of approx. -3.0 V vs. SCE (neglecting the onset of a leakage current at high VDS). The pH sensitivity of the device could be verified by cycling in three different electrolytes: 0.1 M H2SO4 (pH ? 1), 0.1 M KCl (pH ? 5.5) and 0.1 M KOH (pH ? 13). The measurements do show a reproducible pH sensitivity of approx. 55 mV/pH. Measurements at constant drain and gate voltage (versus reference electrode), where the pH of the electrolyte is changed by titrating, have been performed. The response of the sensor is almost real time, taking into account that it needs a few seconds for complete intermixing of the electrolyte. Taking the steady-state values for the current, the sensitivity of the sensor is in the range of 20 mA/mm per pH.
An important parameter describing the performance of the sensor is the resolution. Information about this issue is given by time dependent measurements which do show two main effects: First, a peak-to peak noise of approx. 0.5 mA/mm could be detected. This value gives a very good resolution of approx. 0.05 pH. This value may not be limited by the sensor itself, but by parasitic effects like measurement setup, reference electrode system, or packaging of the diamond electrode (the diamond electrode was here still encapsulated using the PTFE-tape based packaging). The second effect, which again can be assigned to parasitic effects instead of the sensor itself, is the small current drift of 1E-6 A/(mm*s) with time even at nominally constant pH.
TASK 7.3. INTEGRATION AND PACKAGING (STARTING DATE : M1)
Leader : MG Partners : GEM, IVF, SFO, VIV
IVF has produced ceramic carriers for the cantilever and drumskin chips which are placed in stainless steel housings fabricated by a precision ink-jet technology developed by Fcubic for additive manufacturing and 3D printing of metal components. The mechanical design of the housings has been supplied by G&H. The carriers have platinum through wires sintered into the ceramic, which are connected to the pads on the chips by a nano-silver paste provided by GEM. In order to increase the mechanical stability additional glue was used on some samples together with the nano-Ag paste. Temperature cycling between room temperature and 625°C has shown that the glue degrades fast during the thermal stress. Samples only with soldered nano-Ag joints did survive a much higher number of cycles.
In case of the drumskin sensor IVFs glass frit technology is used for sealing the pressure cell. UJF and UoB have made mechanical simulations of this material system. It has been shown that the glass frit is suitable as sealant. UoB has built a test rig for pressure measurements which has been used at IVF in a furnace for measurements at elevated temperatures. The sensors do show very nice electrical characteristics at 350°C after annealing the silver joints at 400°C for 2 hours in nitrogen. Pressure measurements at room temperature of these sensors have been performed up to 80 bar. It has been shown that the highest sensitivity of ?IDS=40% can be reached if the sensing elements (HEMTs) are used in pinch-off (Vgs=-3.5V). Additionally it has been shown that the sensitivity depends exponentially on the pressure.
MG has measured packaged cantilever sensors up to 80 bar at room temperature. The measurements have shown that the accuracy of mounting the ceramic carrier into the housing is a very critical issue of this technology. A small displacement of the actuator needle with respect to the cantilever can destroy the latter. The precision of the 3D layer technique has to be improved in order to avoid this. It has additionally be shown that the stainless steel type has to be changed to a stiffer species for pressures above 80 bar or the thickness of the membrane has to be increased, because an applied pressure of 100bar resulted in a plastic deformation of the membrane.
WP8 PROCESS AND MATERIAL VALIDATION FOR EXTREME POWER CONDITIONS (ATL)
Leader : ATL Partners : IEMN, IVF, MG, SFO, TUW
WP8 HIGHLIGHTS (ATL)
Two mask sets (fast process and power devices) have been designed, fabricated and widely used during the project. Fast process has given a lot of feedback to epi teams and also the first results of GaN HEMT on diamond substrates. Power devices specifications have been defined. Exploration and optimization of device processing (MOS gate, passivation...) and design (Field plate) have led to improvement of device stability, breakdown voltage and fabrication yield.
State of the art device performance with a small signal gain over 20dB, high power density (6.6W/mm) and efficiency (PAE= 70%) @ 2GHz have been obtained. With those devices and with the successful development of a very efficient packaging for thermal management and good impedance matching using high-k materials (WP8.2) a very high power level amplifier has been demonstrated.
This state of the art final results of WP8 is the achievement of many different contributions in the MORGAN project not only from WP8 but also WP3 (epi material) and WP6 (physics).
Other technological development like advanced substrates (WP2), MAX phase materials for high temperature contacts (WP4) and diamond heat spreader related process (WP5) were not integrated into the power HEMT process, as expected, due to the difficulties encountered, but those technologies have gained in maturity and they leave room for improvements in the future.
TASK 8.1. TEST DEVICE FABRICATION (STARTING DATE : M1)
Leader : MG Partner : ATL
By a close cooperation between MicroGaN and ATL the lithography masks, process and relevant test plan has been set up. A four levels process has been running at MicroGaN with the possibility to use 2 additional steps for multi-finger test devices. MicroGaN has processed a total of 27 epi-wafers from all epi sources within WP3 (ATL, Aixtron, EPFL) and 2 wafer from Group4Labs. The principle process flow includes a mesa etch by Ar-sputtering, ohmic contacts (Ti 20nm / Al 120nm / Ni 40nm / Au 10nm annealed 40s @ 900°C), optical gate (Ni 50nm / Au 300nm), passivation (200 nm SiN without NH3) and airbridge (plating: 4µm Au).
A detailed list of electrical parameters has been generated and electrical characterization was performed by manual and automated measurements. Wafer maps have been created from automated measurements after gate deposition and after plating. Parameters like IDOFF, IDSSO, gate-source leakage, etc. has been investigated. The growth groups do get valuable information about homogeneity from wafer maps.
On a series of wafer from AIX the influence of NH3 flux during AlN growth on buffer breakdown voltage has been investigated. AlN starting layers are a key factor for insulating GaN buffers by reducing lattice mismatch and defect density and improving electron mobility. AIX has grown 4 AlInN/GaN heterostructures on SiC with different TMAl/NH3 ratios (240, 1200, 4700, 8200) during AlN growth. Even though the growth mode changes from 2D to 3D with higher NH3 flux, no significant differences of the GaN surfaces morphology between the samples could be observed. In contrast does the buffer breakdown voltage show an increase for low TMAl/NH3 ratios. The cause for this increase is still under investigation. The NH3 flux could have an influence on AlN quality, thickness (deposition rate increases with increasing NH3 flux) and on the AlN/GaN interface.
By comparing unpassivated and passivated devices on a wafer from III-V some general trends in the electrical characteristics can be seen. In general an increase of leakage currents, i.e. IDOFF and gate-source leakage can be observed. This could be caused by surface or interface currents. The current handling capability of the channel (IDSS0) tends to decrease after passivation. This could be caused by charges in the passivation, which can lead to a depletion of the channel region.
EPFL has grown InAlN/GaN heterostructures on three different substrates, namely silicon, sapphire and silicon carbide. The sheet resistance values compare well between the different substrates. The electron sheet density ns can largely vary, between 0.5 and 3.5 x1013 cm-2, depending on the AlInN thickness and composition. Systematically, electron mobility decreases with ns. Consequently, the sheet resistivity remains in a rather narrow range, 300 to 200 ?/sq., for a wide range of AlInN barrier designs. These results could be verified in a second experiment, where the MORGaN device layout has been processed. Parameters, like gate-source leakage current, which do depend strongly on the AlInN layer do not vary notably between the different substrates. The buffer breakdown voltage however does show a strong dependency on the substrate.
An alternative approach to direct growth of GaN on diamond is the layer transfer technique developed by Group4Labs. The MORGaN consortium has purchased wafers from Group4Labs in order to compare these two technologies. The Group4Labs wafers consist of a 100µm thick polycrystalline diamond layer grown on a silicon substrate. A standard Nitronex RF GaN layer with a diameter of 1 inch is bonded onto the polycrystalline diamond layer (2 inch carrier wafer). The GaN layer has quite a few holes in the range of hundreds of micrometers and many in the range of tens of micrometers. The surface of the wafers is very rough due to many small pins and needles of the diamond layer. Due to the extremely low yield a mapping of the wafers was not performed. After optical inspection some control samples have been measured. The working devices do behave like standard GaN-on-silicon from Nitronex with respect to DC characterization.
The electrical results from processed group4Labs wafers have shown that the direct growth of GaN on diamond developed within MORGaN project is a competitive method for the fabrication of power devices on substrates with very high thermal conductivity. The comparison of electrical results mentioned above are not superior to electrical results of devices processed on direct growth layers presented in WP5.
TASK 8.2. RF POWER PACKAGING (STARTING DATE : M7)
Leader : ATL Partners : IVF
WP8.2 was divided in three tasks. The first one was dedicated to packaging for power validation (ATL). This task was focused at package level and was analyzed in close collaboration with the studies done in WP6.4 at transistor level. Thermal simulations were performed with different types of package (Cu-Mo-Cu laminate and Kyocera CM4 proprietary package) and different carrier materials (Al and Cu). Their impact on the maximum channel temperature was evaluated for a 36mm power die versus the total dissipated power. Best results were obtained with CM4 based package and Cu carrier as expected in regard of the thermal conductivities of these materials. Also, the interest of diamond based heat spreaders was evaluated as well as the thinning of SiC substrate to reduce the thermal resistance. We showed that the best combination was to thin down the SiC substrate from 400µm to 100µm and to use a synthetic diamond heat spreader inserted between the SiC chip and the power device package. These solutions were adopted for the realization of the final amplifier in WP8.3.
The second task was focused on the evacuation of heat from the backside of the power device package toward the cold plate with the lower temperature elevation. A dynamic cooler was simulated at ATL and several versions were designed by IVF and ATL using the 3D-metal printing process of Fcubic (collaboration with WP4.3). For the measurements, a specific test bench was assembled at ATL. Initial coolers in steel were realized and tested to validate the approach while final versions in copper were realized at the end of the project thanks to the Fcubic copper based process. This original approach allows us to dissipate up to 100W on 1cm² with a relatively low water flow of 1l/min. The thermal resistance of the cooler was measured to 0.15°C/W up to 90W of dissipated power.
The objective of this third task was dedicated to board materials for device impedance matching. In order to realize compact amplifiers and reduce losses, impedance matching has to be realized as close as possible to the power die. In the frame of the MorGaN project, we developed impedance matching in package using high dielectric constant ceramic materials (K=36 & 80). Electromagnetic and 'circuit based' simulations as well as measurements were performed to extract electrical models of such high K transmission lines. These models were used in WP8.3 for amplifier design.
TASK 8.3. DEVICE TESTING (STARTING DATE : M9)
Leader : ATL Partners : IEMN, TUW
WP8.3 was focused on RF characterization. The first task was dedicated to on-wafer characterization of microwave test devices (ATL, IEMN, TUW). IEMN realized characterization of TUU devices at the state of the art power density of 11 W/mm (38% PAE) @4GHz using InAlN/GaN MOSHEMTS on SiC. TUW & IEMN studied the impact of the Source-Drain distance on the breakdown of normally-off n++ GaN/InAlN/AlN/GaN HEMT. Measurements of AlGaN/GaN HEMT devices on diamond substrate were also measured at 1.25W/mm at 6 GHz on metallic carrier. IEMN/MC2 realized on wafer measurements of elementary 2.4mm total gate width power devices at 2 GHz on CW mode on three generations of devices processed by ATL. The best results were achieved on the third generation: An output power density of 4.1W/mm with 51% of PAE was reached. A study on the impact of the field plate on pulsed I-V measurements and power results were also conducted showing an improvement of the performances of the device with a source connected filed plate on InAlN/GaN power devices. At ATL, power measurements were realized using short pulse setup at 3.5 GHz on elementary 2mm transistors. HEMT devices showed an output power of 6.6W/mm with 70% PAE at Vds=35V. At 2 GHz, under pulsed setup, an output power of 10.5W with 53% of PAE was reached on 2.4mm power transistor.
The second task was focused on RF power evaluation in L-Band at 2 GHz (ATL). Power die were mounted in package. The complete staking was realized thanks to analysis done in WP6.4 and WP8.2. The power die were thinned down to 100µm and mounted on TM180 diamond heat spreader before being soldered in CM4 based power package. Power measurements allow us to reach on a single 36mm power die an output power of 180W with 34% of PAE (Vds=40V, pulsed setup 10 µs/10%). A balanced version with two 36mm power die achieved an output power of 250W with 33% PAE at Vds=30V. A maximum power of 320W was reached.. The balanced version allows us to reach an output power of 180W with 31% PAE in CW in B class. All these results were achieved for the very first time using AlInN/GaN based devices and constitute the state of the art of the technology.
Pout = 41.2dBm (13.2W - 6.6W/mm) with PAE = 70% and Gp=13.4dB measured on wafer @3.5 GHz and Vds=35V (2mm device & short pulse setup). Pout = 40.2dBm (10.5W - 4.3W/mm) with PAE = 53% and Gp=16.2dB measured on wafer @2 GHz and Vds=40V (2.4mm device & CW setup).
Balanced amplifier realized at 2 GHz
250W - 33% PAE achieved at Vds=30V. 320W @ 40V.
WORKPACKAGE 9 : TRAINING (STARTING DATE : M1)
Leader : UoB Partners : All MORGaN partners
The multi-materials nature of MORGaN created opportunities for training. In addition, the range of research activities across the MORGaN workpackages necessitates a cross-fertilisation of capabilities and knowledge. WP9 therefore provided key support in terms of delivering support for research visits between MORGaN partners, supporting specific conferences related to MORGaN technologies and providing a residential course for training young researchers.
HIGHLIGHTS (UOB)
* There have been 17 rounds of WP9.3 research applications which have approved over 40 visits between MORGaN partners or attendance of key conferences/workshops (WP9.3).
* A MORGaN workshop was held at STU (24-26th May 2010) for training of young MORGaN researchers (WP9.2).
* WP9 supported 19th HETECH conference, October 18 - October 20, 2010 organised by MORGaN partner FORTH and ASDAM2010 held 25th-27th October and 2010 organised by MORGaN partner STU (WP9.1)
TRAINING ACTIVITIES DURING THE PERIOD (UOB)
RESIDENTIAL WORKSHOP
A three day training workshop for the MORGaN consortium held at STU and IEE on 24-26th May 2010 as part of the training workpackage (WP9.2). Twenty MORGaN students attended the three day event with students from STU, UoB, FORTH, ITE, ATL, CTU and IC. Full details can be found in Deliverable WP9.2 (M18). The MORGaN residential course provided seminars and practical workshops in a focused three-day residential course for younger MORGaN researchers. The workshop was hosted by the Faculty of Electrical Engineering & Information Technology (STU) with additional demonstrations at the Slovak Academy of Sciences (IEE). In order to promote the event details were included at WP10 dissemination newsletters, promotional material sent via email and presentations made at 6 months progress meetings. All of the 20 allocated places were filled with students attending from STU, UoB, FORTH, ITE, ATL, CTU and IC (Figure 26).
DAY ONE: The first day provided a welcome and introductory talk providing an overview of the MORGaN project and workpackages presented by Sylvain Delage (Figure 27). Presentations were then provided on GaN transistors, microwave characteristion, I-V, C-V and DLTS based characterization of GaN structures along with modelling of GaN structures. The afternoon provided laboratory demonstrations at STU of the characterisation methods described during Day 1. Characterisation data directly related to MORGaN materials and devices were presented, such as nanocolumn growth, AlGaN/GaN & InAlN/GaN HEMTs.
DAY TWO: On day two optical and analytical characterization methods were presented along with Auger and Raman spectroscopy, SIMS and AFM at STU. In the afternoon a short trip to the Slovak Academy of Science provided talks on XRD, FIB and TEM along with a visit of laboratories to show TEM, röntgen, FIB and clean rooms related to microsystems technology. A workshop dinner was held in the evening.
DAY THREE: The final day present talks on SEM, EBIC, reverse engineering with a visit to the analytical laboratories of STU and ILC. Hands on training was available to students and attendees were encouraged to bring sample materials and devices, to aid discussion and the opportunity for examination during the lab sessions. Day three also provided details on how to apply for WP9.3 Research Visits between MORGaN hosts.
Figure 26. Residential course at STU. Sylvain Delage (centre) with organisers A.Dent (UoB) and J. Kovac (STU)
MORGaN CONFERENCE SUPPORT: WP9 supported two conferences, namely the Advanced Semiconductor Devices and Microsystems (ASDAM) held on 25th-27th October 2010 organised by MORGaN partner STU and 19th European Workshop on Heterostructure Technology (HETECH) held on October 18 - October 20, 2010 organised by MORGaN partner FORTH. This provided opportunities for providing invited speakers and for MORGaN researchers to attend the conferences. Further details of the WP9.1 conferences can be found in Deliverable 9.3 (M24) "Training activity report for Year 2". Attendance of additional conference and workshop was also supported by the Research Visits (below).
Figure 27. Welcome introduction (Sylvain Delage, left and Jaroslav Kovac, right)
RESEARCH VISITS: From M1-M36 there were 17 rounds of 'WP9.3 Research Applications' whereby MORGaN researchers from one partner are able to spend time at another MORGaN partner to learn new skills, transfer knowledge to a partner, undertake measurements/characterisation etc. The application procedure involved a simple two page application form that requires details of Applicant, Host Institution, Research Plan, Linkage to MORGaN WPs and estimated visit length and travel/subsistence costs. WP9.3 has also supported visits to a conference/workshop if it is highly aligned with MORGaN (e.g. ASDAM, ICNS-9). All applications required approval by the Project General Assembly via Doodle Poll. Between M1-36 the research visits have provided excellent opportunities for researchers to interact. Full details of the seventeen rounds of visits can be found in the Annual Training Reports (Deliverables 9.1 (M12), 9.3 (M24) and 9.4 (M36)). Fig. 9.3a shows an example whereby a number of WP9.3 visits between Glasgow, Ulm and Wien (e.g. by Rossi, Alomari and Ostermaier) has enabled a strong collaboration between WPs 5 and 6. Dissemination of this collaboration was at an international event (also supported by WP9) which has provided new contacts for the MORGaN newsletter for WP10 activities. Similarly WP9.3 funded visits between UoB, SWEREA, UJF and IEE (e.g. by Rufer, LeBoulbar, Vanko) allowed a fruitful collaboration between modelling (WP6), packaging (WP4), drumskin sensor development (WP7) and high temperature and electrical characterisation. This lead to presentation of the drumskin sensor device at ICNS-9 in Glasgow (Fig 9.3b).
(a) (b)
Fig. 9.3. Examples of interaction of WP9 visits.
Potential Impact:
WP10. DISSEMINATION (VIV)
Leader : VIV
Partners : All MorGaN partners
MORGaN has benefited from the fact that the consortium is full of extremely active, focused and enthusiastic partners that recognise the importance of dissemination activity. In addition to the activities defined in the description of work, c. 40k€ was allocated to be spent on activities proposed by the consortium during the course of the project. This facility allowed a very flexible and pragmatic set of activities to be undertaken.
Given the wide range of technical topics covered by MORGaN, it was decided early in the project that the dissemination activity would have four themes: diamond substrates, III-N materials, harsh environment devices and packaging & metallisation. These themes were used in the website, posters, and other published material to give a characteristic image to the project.
HIGHLIGHTS (VIV)
* Website: The MORGaN public website has attracted over 2000 unique visits per month since Jan-2010, and includes videos, newsletters and other project information
* Industrial events: MORGaN had a booth or tabletop at six industrial trade shows and exhibitions
* Workshops: MORGaN members organised four workshops and training events
* Academic events: MORGaN has been represented at about 70 (non-MORGaN) workshops and conferences presented over 120 conference papers
* Refereed publications: Nearly thirty papers in world-renown journals.
DISSEMINATION ACTIVITIES DURING THE PERIOD (VIV)
Website (D10.4)
The website (www.morganproject.eu) has been online since Jan-2009 and has been kept up-to-date with all public material. The site includes pages on the "Consortium", "Related links" (including other FP projects), "Project news", "Events" and "Topics & results." All the public material, including videos, newsletters, presentation and flyers are available from the site. Thanks to good traffic, frequent updates and cross-links to other projects and partners, the search engine ranking remained good throughout the project; e.g. a search for "morgan gan" or "morgan fp7" returned the MORGaN site top on google.com google.co.uk and google.de (20-Oct-2011). The graph below shows the number of unique visits per month: a gradual rise to c. 2000/ month by Jan-2010 which was maintained throughout the project. The website will remain online for the foreseeable future.
Generic publicity material
* Presentation: A presentation was circulated for approval in Sep-2009 and made public Nov-2009. This was intended for ad hoc presentations by the consortium, as well as a useful overview
* Posters: Six different posters (project overview, consortium plus four technical overviews) were available in laminated form to all partners. These were used at several exhibitions and also for display at the partners' labs and offices
* Flyers: double-sided A5 glossy flyers were sent to all partners for use at all relevant external events
* Trade show items: 250 mugs with the MORGaN logo and two free-standing 2 m × 0.8 m banners were purchased (Jul-2011) for use at trade shows & exhibitions
* Newsletters: Six newsletters (D10.6-11) were produced and sent to the distribution list (D10.5). These maintained a consistent format throughout the project; typically 6-10 A4 pages, summarising technical progress and highlighting MORGaN-related events and news
* Brochures: The first brochure (D10.1) gave background information on the project and the final brochure (D10.2) gave a broad summary of the project achievements (22 page A4 pdf).
MORGaN-organised events
Four workshops were organised by MORGaN partners throughout the project: these are discussed in WP9.
1) HETECH 2009-18th European Workshop on Heterostructure Technology
Günzburg, Ulm, Germany (2-4 Nov-2009)
2) MORGaN Residential Course 2010
Bratislava (24-26 May 2010)
3) HETECH 2010-19th European Workshop on Heterostructure Technology
Fodele, Crete, Greece (18-20 Oct-2010)
4) ASDAM 2010-8th International Conference on Advanced Semiconductor Devices & Microsystems
Smolenice, Slovakia (25-27 Oct-2010)
Exhibitions and trade shows
MORGaN had booths, tabletops or posters at six major exhibitions to disseminate the MORGaN technology:
1) Nanofutures; Gijon, Spain 15-Jun-2010
Duncan Allsopp (University of Bath) attended this EC technology transfer event.
2) Industrial Technology; Brussels, Belgium 07-Sep-2010
Sylvain Delage (III-V Labs), John Weaver (University of Glasgow) and Simon Kinsella (E6) represented MORGaN at this event to improve the integration across disciplines, stakeholders and actors.
3) IMAPS 2010-International Microelectronics and Packaging Society; N. Carolina, USA 31-Oct-2010
Bob Musk (G&H) and Klas Brinkfeldt (Swerea IVF) manned a booth at this industrial-focused US trade show.
4) EuroSimE 2011-12th International Conference on Thermal, Mechanical and Multi-Physics 17-Apr-2011
Simulation and Experiments in Microelectronics and Microsystems; Linz, Austria
Klas Brinkfeldt & Dag Andersson (Swerea IVF) manned a MORGaN booth at this modeling & device conference.
5) ICNS-9-International Conference on Nitride Semiconductors; Glasgow, UK 10-Jul-2011 Toth Lajos (MFA) and John Weaver (University of Glasgow) ensured that a tabletop display was constantly manned at this key materials conference (at which nine MORGaN papers were presented).
6) EMPC 2011-European Microelectronics Packaging Conference; Brighton, UK 12-Sep-2011
Bob Musk (G&H) was in the MORGaN booth for this packaging event for IMAPS Europe.
Conferences
Apart from the events described above, MORGaN was represented, either presenting papers or distributing flyers, at almost seventy other events, from small national or academic society meetings to major international conferences. Over 120 papers were presented at such events during the course of the project! These events are listed here, since although rather long, it gives an insight to the extent and diversity of the activities:
WOCSEMMAD 2009-Workshop on Compound Semiconductor Materials and Devices; FL, USA 15-Feb-2009
SBDD XIV-Hasselt Diamond Workshop 2009; Hasselt, Belgium 02-Mar-2009
Living with Thermal Management: Applications in Harsh Environments; Oxford, UK 05-Mar-2009
PDI Topical Workshop on MBE-grown Nitride Nanowires; Berlin, Germany 05-Mar-2009
FOHEC 2009-Fibre Optics for Harsh Environments Conference; Yeovilton, UK 07-May-2009
PCIM2009-Power Electronics Intelligent Motion and Power Quality; Nuremburg, Germany 12-May-2009
WOCSDICE 09-Workshop on Compound Semiconductor Dev. & ICs, Malaga, Spain 17-May-2009
4M Workshop "Devices for harsh environments"; Vienna, Austria 08-Jun-2009
Jaszowiec 2009-38th Int. Sch. & Conf. on the Physics of Semiconductors; Krynica-Zdrój, Poland 16-Jun-2009
E-MRS 2009- Materials Research Society Spring Meeting 2009; Strasbourg, France 21-Jun-2009
DRC09-Device Research Conference; PA, USA 22-Jun-2009
TWHN 2009- 8th Topical Workshop on Heterostructure Microelectronics; Nagano, Japan 25-Aug-2009
ISCS 2009- 36th International Symposium on Compound Semiconductors; CA, USA 30-Aug-2009
Microscopy 2009; Graz, Austria 30-Aug-2009
Diamond 2009; Athens, Greece 06-Sep-2009
SEPNET (South East Photonics Network) meeting; Havant, UK 30-Sep-2009
216th Meeting of the Electrochemical Society; Vienna, Austria 04-Oct-2009
ICNS-8- International Conference on Nitride Semiconductors; Jeju, South Korea 18-Oct-2009
Slovak Ministry of Education "Centres of Excellence" exhibition; Bratislava, Slovakia 05-Nov-2009
M&N Society Symposium 2009; Athens, Greece 06-Nov-2009
Materials Research Society Fall Meeting 2009; Boston, USA 30-Nov-2009
IEDM 2009- IEEE International Electron Devices Meeting; MD, USA 07-Dec-2009
5th IC-AMRS-5th Int. Conf. of the African Materials Research Society; Abuja, Nigeria 14-Dec-2009
NIMACON 2009-8th Nigerian Materials Congress; Abuja, Nigeria 14-Dec-2009
WOCSEMMAD 2010-Workshop on Compound Semiconductor Materials and Devices; CA USA 14-Feb-2010
16th International Winterschool; Mauterndorf, Austria 22-Feb-2010
MSW 2010-Micronano System Workshop 2010; Stockholm, Sweden 04-May-2010
NDNC2010-New Diamond & Nano Carbons; Suzhou, China 14-May-2010
WOCSDICE 2010-Workshop on Compound Semiconductor Dev. & ICs; Darmstadt, Germany 16-May-2010
PCIM-Power Conversion Intelligent Motion; Nuremberg, Germany 17-May-2010
FOHEC 2010-Fibre Optics for Harsh Environments Conference; Swindon, UK 18-May-2010
CMOS-ET 2010-CMOS Emerging Technologies Workshop; Whistler, Canada 19-May-2010
ICMOVPE XV- Int. Conf. on Metal Organic Vapor Phase Epitaxy; NV, USA 23-May-2010
JNRDM 2010- Journées Nat. du Réseau Doctoral en Microélectronique; Montpellier, France 07-Jun-2010
Mikon 2010- 18th Int. Conf. on Microwave, Radar and Wireless Comms; Vilnius, Lithuania 14-Jun-2010
ISGN3-Growth of III-Nitrides; Montpellier, France 04-Jul-2010
ICPS 2010-30th Int. Conf. on the Physics of Semiconductors; Seoul, Korea 25-Jul-2010
MBE 2010-16th Int. Conf. on Molecular Beam Epitaxy; Berlin, Germany 22-Aug-2010
Diamond 2010; Budapest, Hungary 05-Sep-2010
EUROSENSORS XXIV; Linz, Austria 05-Sep-2010
OEPG 2010- 60th Jahrestagung der Österreichischen Phys. Gesell.; Salzburg, Austria 06-Sep-2010
E-MRS 2010; European Materials Research Society Spring Fall Meeting; Warsaw, Poland 16- Sep-2010
IWN 2010- International Workshop on Nitride semiconductors; FL, USA 19-Sep-2010
MNE 2010-36th International Conference on Micro and Nano Engineering - Genoa, Italy 19-Sep-2010
MME 2010- 21st Micromechanics & Micro system Europe Workshop; Enschede, Netherlands 26-Sep-2010
European Microwave Week 2010; Paris, France 27-Sep-2010
Euripides Forum; Paris, France 30-Sep-2010
Micro & Nano 2010; Athens, Greece 12-Oct-2010
4M 2010 Conference; Oyonnax, France 17-Nov-2010
Materials Research Society Fall Meeting 2010; Boston, USA 29-Nov-2010
RSD 2010- Reactive Sputter Deposition Symposium 2010; Ghent, Belgium 09-Dec-2010
SBDD XVI- Hasselt Diamond Workshop 2011; Hasselt, Belgium 21-Feb-2011
German-Polish Conf. on Crystal Growth 2011; Frankfurt (Oder), Germany/Slubice, Poland 14-Mar-2011
Microscopy of Semiconducting Materials 2011; Cambridge, UK 04-Apr-2011
E-MRS 2011 - Materials Research Society Spring Meeting 2011; Nice, France 10-May-2011
NANOPACK workshop on Thermal Management; Paliseau, France 23-May-2011
WOCSDICE 2011-Workshop on Compound Semiconductor Dev. & ICs; Catania, Italy 29-May-2011
DRC 11-69th Device Research Conference; Santa Barbara, USA 20-Jun 2011
EMF 2011 2011-European Meeting on Ferroelectricity; Bordeaux, France 26-Jun-2011
IWASI 211-4th IEEE Int. Workshop on Advances in Sensors and Interfaces; Brindisi, Italy 28-Jun-2011
International Conference on Additive Manufacturing; Loughborough, UK 07-Jul 2011
Diamond 2011; Garmisch-Partenkirchen, Germany 01-Aug-2011
MNE 2011-Micro and Nano Engineering; Berlin, Germany 19-Sep 2011
Solid State Devices & Materials 2011; Nagoya, Japan 28-Sep 2011
ACSIN 2011-Atomically Controlled Surf., Interfaces & Nanostructures; St. Petersburg, Russia 03-Oct-2011
European Microwave Week EuMW 2011; Manchester, UK 09-Oct-2011
Compound Semiconductor IC Conference; HI, USA 16-Oct-2011
IEEE Sensors Conference; Limerick, Ireland 28-Oct-2011
Videos
Five videos were recorded at the 18M meeting in Jul-2010:
* Project overview Sylvain Delage III-V Labs
* Diamond substrates Tim Mollart E6
* III-N material development Duncan Allsopp University of Bath
* Packaging and metallisation Per Johander Swerea IVF
* Harsh environment devices Ulrich Heinle MicroGaN
A professional company was used to record and process the videos, paid for from the WP10 fund, and the five videos went online in Nov-2010.
Publications
Two articles were published in Compound Semiconductor magazine, and a final article is planned for Jan-2012:
* "EU GaN project shows diamond promise," Compound Semiconductor magazine (24-Jun-2009)
* "Europe turns to AlInN to push the limits of transistor and sensor performance," Compound Semiconductor magazine (01-Nov-2009)
* Final article (in progress) scheduled for Compound Semiconductor magazine Jan-2012
Twenty-seven papers for refereed journals were published from MORGaN work; full details are given in D10.3. These articles are all in highly esteemed journals including Journal of Applied Physics, Journal of Crystal Growth and Physica Status Solidi.
WP11. MONITORING OF INNOVATION (III-VLAB)
Leader : III-VLab Partners : All MorGaN partners
The aim of this workpackage was to enhance innovation for outputs issued from MORGaN project which is more a technology driven one, where we consider the future market as one of key success factors. It was based on the so-called MIM© method. This work package activity started on Month 15 to define a set of parameters to be filled by the partners. This initial activity was carried by a set of 7 members of MORGaN consortium. Finally matrixes were filled by about 15 partners, with exception mostly from the academia world. This exercise was interesting and not often realized in such type of relatively long term research project. We hope that will improve the innovation process for the MORGaN participants, and that even improved MIM tools could be applied to additional cases and project.
The questionnaire treatment was carried out by Bernard Monnier, inventor of the MIM© method, helped by Sylvain Delage, MORGaN project coordinator.
* This Workpackage activity started on time at M15.
* A partners' pioneering panel was defined for establishing a suitable questionnaire to evaluate the potential innovation seeds stemming from MORGaN project.
* A matrix was prepared and submitted to the defined panel.
* Afterwards this matrix was applied to different identified innovations.
Monnier's Innovation Matrix tool
The Monnier's Innovation Matrix© (MIM©) is a new tool to measure the innovation level of an offer (product and/or service). This tool is mainly composed of:
* A metric tool: a complete process to measure the maturity of innovation. The MIM© is a systematic metric/measurement system that supports assessments of the maturity of a particular innovative offer and the consistent comparison of maturity between different types of innovative offer. 7 levels are proposed in order to evaluate innovation maturity. MIM© is a two-dimensional matrix where market (demand) and ideas (supply) are represented on the axes. Many parameters are considered for assessing each axis. Some templates are proposed as a guide for the different phases of the process.
* A methodology: a complete process for moving from one quadrant to another more favorable one in order to improve innovation level for a strategic view of the future.
This matrix could be considered as a standard measure for different products, similar to a diagnostic framework where you may identify the parameters to be focused on in order to improve the innovation level.
The MIM© is split into seven areas (see), those distribute innovation in seven levels with the following semantics:
* LEVEL 1: There is only a preliminary idea for a business or a product (or service) to be evaluated. The market is not really identified. The solution to the problem is poor and needs to be confirmed. It is the lowest level of innovation
* LEVEL 2: There is a technical idea, a concept, a product or a service to be promoted in a market which is not yet identified
* LEVEL 3: There is an identified market but not a solution to answer this demand
* LEVEL 4: There is a product/service and an identified market for it.
* LEVEL 5: There is a sophisticated product/service and an identified market for it
* LEVEL 6: There is a product/service and a huge identified market for it.
* LEVEL 7: There is a sophisticated product/service and a huge identified market for it, which is the highest level of innovation.
Figure 28. Monnier's Innovation Matrix©: the Innovation in 7 levels
This concept is similar to the TRL (Technology Readiness Level) evaluation about the maturity of a particular technology. TRL has 9 levels while MIM© has 7 but it' the same idea. The "Y" axis of the MIM© takes into account this specific metric.
The performance of the measure depends on the assessment of the axes; this work package will address this point. It also depends on the accuracy of the information provided by assessment of each axis. This WP will be dedicated for activities in order to make reliable the information included in this matrix.
Electrochemical sensors as an example of MIM analysis
* TUU: Device sensor processing
* Gwent Group: Sensor product.
* Main Concerned Work Packages: WP6 - WP7 - WP3
The University of Ulm was very involved in the development of sensors for electrochemical applications based on InAlN/GaN materials. Figure 29 shows the MIM analysis. If the demonstration is clearly original (starting point on the upper left of the matrix), the challenges will be the development of the manufacturing capability and the patent protection. One of the strength of the innovation is the capability to process large wafers and to keep potentially reasonable costs. The path towards the MIM Level 7 is not yet well foreseen. Figure 30 shows the radar plot of the MIM electrochemical sensor, which shows the strength of different factors along the years.
Figure 29. Expected innovation stemming from InAN/diamond based electrochemical sensors
Figure 30. Radar plot concerning the electrochemical sensors innovation.
List of Websites:
www.morganproject.eu