Taking the heat off photonic systems
The rapid uptake of smartphones and tablets bundled with 4G technology are putting a huge strain on network capacity. Other factors fuelling growth in data traffic include cloud-computing and virtualisation services, the internet of things, and the prospective online access to education and the delivery of personalised healthcare. “The intimate integration of photonics and electronics in a single chip will be key to scaling up to these traffic requirements, giving silicon photonics the potential to meet the needs for higher energy efficiency, lower cost and minimum space,” notes Kafil M. Razeeb, senior research scientist at the Tyndall National Institute who has been leading the EU-funded project TIPS. This project addressed the thermal issues arising from the high level of packaging and integration of photonic devices. Poor heat management From a thermal perspective, silicon photonics – in which III-V photonics devices are integrated on a silicon-on-insulator (SOI) substrate – is challenging. Active photonic devices generate extremely high heat flux levels that must be efficiently removed to maintain reliable performance. In addition, in high-bandwidth multiplexing systems, laser temperature must be kept within 0.1 °C of the operating temperature to maintain emission wavelengths within design specifications. Removing heat from a junction-side-up architecture is difficult. The situation is compounded by the fact that the oxide isolation layer on SOI wafers separates the device from its heat sink. Furthermore, ridge-like wave guides increase thermal spreading resistance and the temperature control demands of photonic and electronic devices are incredibly different. Today’s state-of-the-art devices combine the use of a large solid-state macro-thermoelectric cooler (macroTEC), resistive heating elements, large thermal spreaders and external air cooling. Yet, the arrangement of these thermal control elements is complex, limits energy efficiency and further component integration. This poses a significant barrier to achieving greater data rates in smaller packages. “Squeezing more functionality into ever smaller package footprints, while also simultaneously pushing efficiency and performance gains, leads to a substantially increased thermal density,” notes Razeeb. Chip designers are called to deploy new thermal solutions to effectively dissipate all heat generated by photonic components. Novel architecture for more effective heat control A core feature of the TIPS approach for effective temperature control is the replacement of the large, energy-hungry macroTECs with microTECs integrated around each heat-generating photonic device (laser). MicroTECs remove any parasitic thermal resistance and reduce the need for thermoelectric materials and individual resistive heaters. They also permit the integration of optoelectronic components with different operating temperatures. Microchannels were also etched into the device substrate, carrying the heat from the hot side of the microTECs and the lasers to the heat exchangers. Particular focus was placed on how elastic turbulence can improve heat transfer of the microchannels. Use of novel micro-pumps drove the fluid flow around flow loops, while micro-valves regulated it into the microchannels. Thermal management has traditionally been relegated to the last step in the design process. However, the exponential growth in data traffic has rapidly made it a critical factor for the telecom industry. TIPS researchers identified that existing thermal solutions cannot match the exponential growth in data traffic. However, their highly scalable and efficient integrated source-to-sink thermal solutions should enable production of next-generation photonic devices that support massive bandwidth growth.
Keywords
TIPS, heat, photonic device, macro-thermoelectric cooler (macroTEC), microTEC, data traffic, silicon-on-insulator (SOI), microchannels, silicon photonics, temperature control, micro-pumps