New-generation GPGPUs increase energy efficiency by an order of magnitude
We are all familiar with Moore’s Law and, to a lesser extent, Dennard scaling. Their combination dictates that every year, technological advances will see the number of transistors on the same area double without increasing their overall power consumption. However, since 2005, this pace has been increasingly difficult to sustain. Transistors still get smaller, but power consumption increases with every new generation of devices. At the end of the tunnel is the power wall, where processors will consume too much electrical power for their size and simply burn out. Engineers circumvented the problem by using multi-core processors. In doing so they created another wall – the programmability wall. This makes the development of software that is able to gather more power from concurrent processors, notoriously difficult. So how do we break these walls, you might ask? This is the million-dollar question the EXAFLOW project has been trying to answer. “Breaking the power and programmability walls are two intertwined efforts,” says Prof. Yoav Etsion, coordinator of the project for the Israel Institute of Technology. “The power wall requires us to come up with new computing models and processor designs that will be more power efficient than the prevailing, 70+ year-old von Neumann model; and the programmability wall requires us to ensure that these new computing models will be easy to use and to program.” To get there, Prof. Etsion’s team has designed a new type of processor. This relies on the single-instruction, multiple threads (SIMT) processing paradigm – a paradigm that emerged from graphic accelerators (GPUs) like that of NVIDIA and AMD, and later resulted in GPUs for general purpose computing (GPGPUs). “The EXAFLOW project set out to rethink the way we design GPGPUs. We wanted to fundamentally redesign the processor itself around the programming model, and not the other way around. And indeed, our latest results show that our processor dramatically outperforms GPGPUs whilst providing about an order-of-magnitude more energy efficiency,” Prof. Etsion enthuses. The secret behind this better performance lies in the use of the “dataflow” execution model – a 50 year-old model that had yet to be used to execute concurrent (parallel) code. Dataflow execute instructions as soon as their dependencies are met. This is in contrast to von Neumann architectures that execute instructions when they get to the top of the stream, regardless of their dependencies. The latter Prof. Etsion compares to incandescent light bulbs, as far as energy efficiency is concerned. The functional resources, as compared to standard GPGPUs, are the same but they are wired differently to allow intermediate values to be communicated directly between functional units. This allows the compute fabric to be almost 100% utilised. “We use two variants of dataflow ("static" and "dynamic") at runtime, to extract instruction-level parallelism and execute concurrent threads out-of-order. Whenever an instruction from one thread is blocked on a long memory access, functional units go on to compute instructions from other threads. Finally, since intermediate values are communicated directly between functional units, we do not need a register file. This is another major energy saving,” Prof. Dr. Etsion explains. By providing evidence that breaking away from the von Neumann model can offer great performance and energy consumption benefits, Prof. Dr Etsion hopes to inspire other researchers to explore new computing models that will eventually break the power and programmability walls. He and his team are currently exploring opportunities to commercialise their processor, and will be exploring two different academic paths. “Firstly, my team is working on developing new processor architectures based on the dataflow model. And secondly, we are developing a new dataflow language for hardware design, which will make designers 10 times more productive. We hope to be able to present these in the near future,” Prof. Dr Etsion concludes.
Keywords
EXAFLOW, GPGPU, von Neumann, dataflow, transistor, Moore’s Law, Dennard scaling, power wall, programmability wall, multi-core, processor, paradigm
