Final Report Summary - HETSI (Heterojunction solar cells based on a-Si c-Si)
In WP3 the main achievement is EPFL's development of wet-chemical processes that lead to cell efficiencies of 19.7 % on 2x2 cm2 cells. At CNRS, plasma conditions have been optimised for cleaning the c-Si surface that led to equivalent surface passivation as HF. Moreover, first results for a HET cell with a dry cleaning process have been achieved: the best Voc so far is 693 mV. Finally, outstanding passivation level with solar cell precursors have been obtained with Voc implied up to 720 mV. Concerning mc-Si substrates, some Etch-polished and cleaned mc-Si samples from Photowatt passivated with 20nm (i)a Si:H have resulted in a (spatially averaged) carrier lifetime of 31 microsecond at 1015 cm-3, and an implied Voc of 664 mV at one sun. This is an excellent value for mc-Si substrates.
A round robin experiment has been conducted on transparent conductive oxide in WP4: TCO layers consisting of ITO, ZnO:B and ZnO:Al, also fabricated by different deposition methods, have been tested and compared. For layers with anti reflection thickness, sheet resistivities below 50 Ohm Sq and transparencies higher than 85 % over the relevant wavelength range have been obtained. For thicker layers, mobilities above 40 cm2/Vs have been measured. We have also performed some metallisation tests with different low temperature screen printed pastes from different suppliers. We have demonstrated that some of these pastes are achieving the targeted values for contact resistivity on ITO. Nevertheless, the resistivity is still too high with a single print process. In order to allow sufficiently low series resistance and a high aspect ratio, a multiple print process should be considered. Finally, these metallisations have been applied to real large area solar cells with appropriate multiple prints and fill factors up to 78 % have been obtained.
In WP5, INES has processed 125 pseudo square solar cells with efficiencies up to 19,5 % for FZ and 19 % for CZ wafers. First tests on mc-Si have allowed to obtain up to 15,5 % on square 125 mm wafers and 640 mV. EPFL has also obtained excellent results with efficiencies higher than 19 % on 2x2 cm2 with large area PECVD reactors.
WP6 dealing with RCC-HET structure has fulfilled its objectives with surface passivation of the front surface lower than 50 cm/s and a proof of concept has been realised for RCC-HET structure with efficiencies up to 15 % on 1 cm2.
Module process (WP7) is also under progress with satisfying results, even if the number of cells available is low. First modules with large area solar cells have been processed with conductive adhesives for interconnection. Damp heat tests have shown that an aluminium foil at the back is necessary to prevent from moisture penetration due to the sensitivity of ITO. The first bifacial NICE (new industrial cell encapsulation) module has been processed with four cells. The module is functional and the rear surface exhibit 85 % efficiency of the front side. Nevertheless, fill factors has to be improved due to problems of interconnection and internal pressure into the module.
Finally, in WP8, a second estimation of costs has been established by the partners of WP8 with more realistic hypothesis thanks to a more precise process flow.